This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM5726: DDR HW leveling clarification

Part Number: AM5726

Champs,

in the latest revision of the EMIF configuration tool ( Step1-System details, 2A) PCB trace lengths) it says that the PCB trace lengths info is NOT required when using HW leveling. Yet, modifying the values or removing them altogether impacts the EMIF PHY registers in the generated uboot code. 

Could you please confirm that HW leveling is indeed capable of converging from any initial state?

If that's the case should associate piece of the uboot code be removed altogether in case HW leveling is selected?

thanks

Michael