Linux/AM4376: TPS65218 DCDC3 issue

The PMIC experts have been notified. They will respond here.

Hi Sir

the PMIC is TPS65218B1RSLR

FYR

BR
Yimin

No offense, Biser Gatchev-XID, but I cannot tell from reading this code what it might be telling the PMIC to do.

It appears to be a low-power mode issue, where the Linux code wants to keep the DDR alive, so it would make sense that DCDC3 stays enabled if it has been told to do so by the processor.

In order to save power when DCDC3 continues running, Load Switch 1 (LS1) should be turned off at this time, which will remove power from the VDDS_DDR rail of the processor.

Can you summarize the meaning of this code and determine if this is a possibility?

Yimin,

Based on this comment and code:

yimin bai34 said:

/*
* Certain revisions of TPS65218 will need to have DCDC3 regulator
* enabled always, otherwise an immediate system reboot will occur
* during poweroff.
*/
if (rid == TPS65218_DCDC_3 && tps->rev == TPS65218_REV_2_1)
return 0;

I'd say this feature has been disabled due to the stated reason. If you are sure this is not an issue with your board, you could simply remove this code. I would be very cautious though, based on the comment.

Maybe the PMIC experts on this thread can expand on some reasons for this...

Ron,

There are no limitations of the DCDC3 converter and it is not unique when compared to DCDC1 or DCDC2.

The DCDC3 converter powers DDR, and the PMIC will not cause the system re-boot.

It is my understanding that when DDR must be kept alive at all times, powering down DCDC3 will trigger the processor to initiate a re-boot.
The PMIC only initiates reboots when output voltages are out of regulation (below VPG, above VOV).

I hope someone more familiar with the processor will be able to explain the use cases when DDR must remain on at all times.

When the AM3 or AM4 processor enters suspend mode there are two types: suspend to RAM or suspend to disk. When using the suspend to RAM option, the SoC DDR rail can be turned off but the power to the DDR chips must stay on. This is why DCDC3 passes through a load-switch LS1 before reaching the SoC DDR rail, but the DDR chips are powered directly before the load-switch. 

dcdc3: regulator-dcdc3 {
regulator-name = "vdcdc3";
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
regulator-state-disk {
regulator-off-in-suspend;
};
};

The behavior Yimin describes should not be occuring during a normal shutdown request though. The code in tps65218-regulator.c might be removing DCDC3 from the power sequence due to a previous suspend request and not adding it back in the sequence for a shutdown request. 

Yimin,

If suspend is not being used, I would either remove the code in regulator.c or change the device tree property "regulator-on-in-suspend" to "regulator-off-in-suspend". Let us know if that helps. 

Hi Sir

We did some experiment as below by using latest SDK v4.3

In GP-EVM 1.2 with TPS65218A1
we execute poweroff command and the DCDC3 is off

In our board with TPS65218B1
a. we execute poweroff command and the DCDC3 is on.
b. we do two experiments to remove the code in regulator.c or change the device tree property
"regulator-on-in-suspend" to "regulator-off-in-suspend".
system will do reboot.

please advise why the bevior is different and how to turn off DCDC3 after executing power-off

BR
Yimin

Hi Sir

Could you comment about our experiment in TPS65218A1 and TPS65218B1 for DCDC3 on/off issue in power off status?

In GP-EVM 1.2 with TPS65218A1

we execute poweroff command and the DCDC3 is off

In our board with TPS65218B1

a. we execute poweroff command and the DCDC3 is on.

b. we do two experiments to remove the code in regulator.c or change the device tree property

"regulator-on-in-suspend" to "regulator-off-in-suspend". system will do reboot.

Does it have any side effect to keep DCDC3 on while executing power off command ?

BR

Yimin