Other Parts Discussed in Thread: AM5728
[1] 2 sentences from "For 2-bit ECC errors in the data..." paragraph in the AM5728 TRM Section 15.3.4.14 (and identically in the AM574x TRM, same section, same paragraph):
It must be noted that the EMIF will neither correct the data for these uncorrectable errors.
...
The read data received from the memory may have further been corrupted by the ECC correction logic since it will have attempted to correct the read data but failed due to uncorrectable error.
So...what data will the MPU/ARM get with a bad read: raw or mangled? How do I parse these sentences?
[2] I haven't found any description of what happens if the ECC chip (or bus) produces a 1-bit (or participates in an N-bit) error. Is an interrupt produced? Are any register values generated? Is this silently ignored? Is the read data mangled or safely handled by ECC correction logic? Is there an expectation the ECC chip and bus are magic and never will have errors, unlike the memory being protected?
[2a] Along the same lines: are there any registers available for direct ECC bus access? (I've got indirect manipulation tests looking for issues, but it's all very nefarious, laborious, and unsure, for what could be straightforward with simple, direct access.)
