Part Number: AM5718
Hello. In DS for AM571x (rev. january 2017) in 8.2.2 there are requirements for matched lengths for ADDR_CTRL and CK signals for DDR. Considering these requirements i didn't find any requirements about skew CK signals within it's pair in areas A1+A2 and A3. Could you explain, what are these requirements and why they are not mentioned cause requirements for AT skew area is 1ps and its very strict although requirements for simply A1+A2 (include ADDR_CTRL) are 29ps what is much more than 1ps. It can't be skew for CK pair in this area
