RTOS/AM3359: SPI performance issue

Andrew Hatko

Part Number: AM3359
Other Parts Discussed in Thread: AM3358, , SYSBIOS

Tool/software: TI-RTOS

I am trying to use SPI bus for data transfer. When I finally was able to make it work under recent TI-RTOS I see disappointing performance.

Bus is configured for data words 32bit and clock 24MHz.

When it transfers 12 data words it pulls CS down for about 15us before first clock signal.

It also stays idle for about 10us before transferring next data word ( I am transferring total 12 words per frame)

After last word it waits ~50us before pulling up CS.

I am able to read frames at much lower rate than expected from 24MHz clock.

It looks that actual time spend on data transfer is very small compared to the idle time within single transfer.

What is wrong and what can be done to increase bandwidth.

If needed I can provide additional information.

Thanks

over 8 years ago

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

The RTOS team have been notified. They will respond here.

0 lding over 8 years ago in reply to Biser Gatchev-XID

TI__Guru* 95265 points

Hi,

Can you clarify what TI Processor SDK RTOS release you used for this test and what test application/driver example is used for this evaluation?

Regards, Eric

0 Andrew Hatko over 8 years ago in reply to lding

Prodigy 100 points

We are using Beaglebone Black Wireless. This board uses Octavo chip. I believe it has AM3358 or AM3359 processor.

Board was modified by adding JTAG connector. We use Blackhawk probe.

Software is as follows:

CCS ver 7.4

RTSC/XDCTools ver 3.5

Sample MCSPI_SlaveMode_MasterExample_bbbAM335x_armExampleProject was used.

It was modified as follows:

main was replaced by the code:

#include <stdio.h>
#include <string.h>

/* XDCtools Header files */
#include <xdc/std.h>
#include <xdc/cfg/global.h>
#include <xdc/runtime/System.h>
#include <stdio.h>
#include <ti/sysbios/knl/Task.h>

/* BIOS Header files */
#include <ti/sysbios/BIOS.h>
#include <xdc/runtime/Error.h>

/* CSL Header files */

/* OSAL Header files */
#include <ti/osal/osal.h>

/* TI-RTOS Header files */
#include <ti/drv/spi/soc/SPI_soc.h>
#include <ti/drv/spi/src/SPI_osal.h>
#include "SPI_log.h"

#include <ti/board/board.h>

    SPI_Handle spi1;
//#pragma DATA_ALIGN (Tx, 128)
    uint32_t Tx[12];
//#pragma DATA_ALIGN (Rx, 128)
    uint32_t Rx[12];

void spi_test(UArg arg0, UArg arg1);

SPI_Handle OpenSPI(uint32_t channel, SPI_Params *params)
{
SPI_v1_HWAttrs spi_cfg;

/* Get the default SPI init configurations */
SPI_socGetInitCfg(1, &spi_cfg);

/* Modify the default SPI configurations if necessary */

/* Set the default SPI init configurations */
SPI_socSetInitCfg(1, &spi_cfg);

/* Do the necessary set up configurations for McSPI.*/
SPI_init();

/* Open MCSPI instance 1 driver */
return ( SPI_open(channel, params));
}

/* Default SPI parameters structure */
SPI_Params spi_params = {

    SPI_MODE_BLOCKING, /* transferMode */
    0,
    NULL,               /* transferCallbackFxn */
    SPI_MASTER,         /* mode */
    24000000,            /* bitRate */
    32,                  /* dataSize */
    SPI_POL0_PHA1,      /* frameFormat */
    NULL                /* custom */
};

void SPIDataSet(void)
{
uint32_t index = 0;

    for (index = 0; index < 12; index++)
    {
            Tx[index] = index + 5;
            Rx[index] = (uint32_t) 0;
    }
}

/*
* ======== main ========
*/
int main(void)
{

    Task_Handle task;
    Error_Block eb;
    Error_init(&eb);

    /* Call board init functions */
    Board_initCfg boardCfg;
    Board_STATUS boardStatus;

    boardCfg = BOARD_INIT_PINMUX_CONFIG |
        BOARD_INIT_MODULE_CLOCK |
        BOARD_INIT_UART_STDIO;
    boardStatus = Board_init(boardCfg);
    if (boardStatus != BOARD_SOK)
    {
        return (0);
    }

    spi1 = OpenSPI(1, &spi_params);
    if(spi1 == NULL)
       {

BIOS_exit(0);
}

    task = Task_create(spi_test, NULL, &eb);
    if (task == NULL)
    {
        BIOS_exit(0);
    }

    /* Start BIOS */
    BIOS_start();
    return (0);
}

void spi_test(UArg arg0, UArg arg1)
{
SPI_Transaction transaction;

SPIDataSet();

    transaction.count = 12;
    transaction.txBuf = Tx;
    transaction.rxBuf = Rx;

SPI_transfer(spi1, &transaction);

SPI_close(spi1);
}

This is code just for evaluating spi interface. Assertion of the CS is important since we have to wait till we can talk to a different chip.

Thanks,

Andrew

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RTOS/AM3359: SPI performance issue