I'm uisng F2808, with CCS 4.x and BIOS 6.x.
When I do a build all, the common_p28L_x.xdl file gets regenerated. This file appears to be used when I link.
I tried to change some of the sections to different memory areas (such as .text and .cio) in the common_p28L_x.xdl, but of course, when I do a build all, the file gets overwritten. It is putting the sections in various places, but I don't know where to define those, so I can specifically place sections at different locations.
What do I need to change / update to redefine where the tool is automatically putting those sections? I want to specifically define where individual sections are place. For example, can I place .cio to L0SARAM or .cio to L1SARAM?
I'm having a hard time distinguishing what level control I have over the linker, as oppose to what gets autogenerated.
Thanks-
Jeff