AM5728: McASP configuration

Janardan M

Part Number: AM5728
Other Parts Discussed in Thread: OMAPL138, PCM1864

Hi,

In my project I am using Sitara evmAM572x board, I am programming the DSP1 core, I have connected the circular microphone board ( CMB ) to McASP7 bus of evmAM572x, CMB is configured as master, I can see all the signals out of the CMB when i probe the lines. I want to configure McASP7 of sitara processor as slave. How can I do it?

If I assume that if McASP7 receive clocks and hence it automatically acts as slave, I am expecting the DMA interrupts to appear. but I am unable to see it, is there any reference source code to achive this?

#define MCASP_RX_DMA_CH CSL_EDMA3_CHA_MCASP6_RX
#define MCASP_TX_DMA_CH CSL_EDMA3_CHA_MCASP2_TX

extern EDMA3_DRV_GblConfigParams sampleEdma3GblCfgParams[];
/* EnableEDMA event in the SampleCfg*/
static void enableEDMAHwEvent(uint32_t edmaNum, uint32_t eventNo) {
sampleEdma3GblCfgParams[edmaNum].dmaChannelHwEvtMap[eventNo/32] |= (1 << (eventNo%32));
}

Below is my code snippet.

    /* 1. EDMA Initializations */
    EDMA3_DRV_Result edmaResult = 0;

    enableEDMAHwEvent(EDMACC_NUM,MCASP_RX_DMA_CH);
    enableEDMAHwEvent(EDMACC_NUM,MCASP_TX_DMA_CH);

    hEdma = edma3init(EDMACC_NUM, &edmaResult);

    if (edmaResult != EDMA3_DRV_SOK)
        {
            /* Report EDMA Error
             */
            MCASP_log("\nEDMA driver initialization unsuccessful\n");
        }
        else
        {
           MCASP_log("\nEDMA driver initialization successful.\n");
        }

I am thinking that I have missed some configurations. Please suggest me for corrections.

Thanks and Regards,

Janardan M

over 7 years ago

0 Biser Gatchev-XID over 7 years ago

TI__Guru**** 393215 points

The RTOS team have been notified. They will respond here.

0 Rahul Prabhu over 7 years ago

TI__Guru** 116170 points

Janardhan,

We are currently supporting the CMB based design only with OMAPL138 and K2G platforms. The TI Design demos use the same MCASP driver and the same MCASP IP for audio interface. Have you checked the K2G implementation to confirm that your MCASP configuration are accurately configured.

Here are other common issues would be confirming

Is the PCM1864 is configured and supplying the clocks to the MCASP. Can you put a scope on the bit clock and the high clock pins to see if the clocks are generated as expected and feed into MCASP?
Have you checked to see that MCASP7 is enabled in PRCM module and the pinmux for the MCASP7 pins are configured correctly.
Unlike K2G the interrupt mechanism on AM57xx is also different. You need to check the EDMA Crossbar setup to see if MCASP7 is hooked to interrupt the core if not then you will need to use CSL code to connect the MCASP7 event to the EDMA Crossbar

Regards,

Rahul

0 Janardan M over 7 years ago in reply to Rahul Prabhu

Expert 1115 points

Hi Rahul,

Thanks for the response. I have gone through the K2G code and tried to configure McASP7 as below.

#define MCASP_NUM_CMB 6

status = mcaspBindDev(&hMcaspDev_CMB, MCASP_NUM_CMB, &mcaspParams_CMB);
if((status != MCASP_COMPLETED) || (hMcaspDev_CMB == NULL))
{
MCASP_log("mcaspBindDev for McASP Failed\n");
abort();
}

/* Create Mcasp channel for Rx */
status = mcaspCreateChan(&hMcaspRxChan, hMcaspDev_CMB,
MCASP_INPUT,
&mcasp_chanparam[0],
mcaspAppCallback, NULL);
if((status != MCASP_COMPLETED) || (hMcaspRxChan == NULL))
{
MCASP_log("mcaspCreateChan for McASP2 Rx Failed\n");
BIOS_exit(0);
}

When I the run the code, there is no error using the API "mcaspBindDev", but I am facing issue using API "mcaspCreateChan", control is going to abort while using "mcaspCreateChan". what could be the possible issue?

Thanks,
Janardan M

0 Janardan M over 7 years ago in reply to Janardan M

Expert 1115 points

Hi,

I am able to resolve the above mentioned issue. Now I am facing the issue which is explained below.

CMB is configured as master and hence evmAM572x as slave, I am able to observe the LRCLK, BCLK and data out of CMB, my configuration is to receive the audio data and generate the DMA event.

I am able to obtain the interrupt but I am unable to see the data in the buffer, if I observe the "MCASP_RXSTAT" register , I am getting to see that "RSYNCERR" and "RCKFAIL" flags being set.

I suspect there is some mismatch in my McASP configuration, what would be the issue and possible work around.

Please find the below configurations for the reference.

/* .rmask = */ 0xFFFFFFFF, /* All the data bits are to be used */ // McASP_RXMASK

/* .rfmt = */ 0x000180F0, // McASP_RXFMT

/* 0/1 bit delay from framsync
* MSB first
* No extra bit padding
* Padding bit (ignore)
* slot Size is 32
* Reads from DMA port
* NO rotation
*/

/* .afsrctl = */ 0x00000111, /* I2S mode, // McSP_RXFMCTL
* Frame sync is one word
* Externally generated frame sync
* Falling edge is start of frame
*/

/* .rtdm = */ 0x00000003, /* 2 slots are active (I2S) */ // McASP_RXTDM

/* .rintctl = */ 0x00000003, /* sync error and overrun error */ // McASP_EVTCTLR
/* .rstat = */ 0x000001FF, /* reset any existing status bits */ //MCAP_RXSTAT
/* .revtctl = */ 0x00000000, /* DMA request is enabled or disabled */ // MCASP_REVTCL

/* .aclkrctl = */ 0x00000080, /* External Source, rising edge */ // MCASP_ACLKRCTL

/* .rclkchk = */ 0x00000000 // McASP_RXCLKCHK

Mcasp_ChanParams mcasp_chanparam1;
mcasp_chanparam1.noOfSerRequested = RX_NUM_SERIALIZER;
mcasp_chanparam1.indexOfSersRequested[0]= Mcasp_SerializerNum_1;
mcasp_chanparam1.indexOfSersRequested[1]= Mcasp_SerializerNum_3;
mcasp_chanparam1.mcaspSetup = &mcaspRcvSetup1;
mcasp_chanparam1.isDmaDriven = TRUE;
mcasp_chanparam1.channelMode = Mcasp_OpMode_TDM;
mcasp_chanparam1.wordWidth = Mcasp_WordLength_32;
mcasp_chanparam1.userLoopJobBuffer = NULL;
mcasp_chanparam1.userLoopJobLength = 0;
mcasp_chanparam1.userLoopJobLength = NULL;
mcasp_chanparam1.gblCbk = (Mcasp_GblCallback)&GblErrRcv;
mcasp_chanparam1.noOfChannels = 2;
mcasp_chanparam1.dataFormat = Mcasp_BufferFormat_1SER_MULTISLOT_INTERLEAVED;
//mcasp_chanparam1.dataFormat = Mcasp_BufferFormat_1SER_MULTISLOT_NON_INTERLEAVED;
mcasp_chanparam1.enableHwFifo = TRUE;
mcasp_chanparam1.hwFifoEventDMARatio = 2;
mcasp_chanparam1.isDataPacked = TRUE;
mcasp_chanparam1.wordBitsSelect = Mcasp_WordBitsSelect_LSB;
mcasp_chanparam1.edmaHandle = hEdma;

I am obtaing the signals with below specifications from CMB:

Frame Sync (LRCLK) = 16kHz and Bit Clock (BCLK) = 1MHz

Please suggest me to resolve my issue.

Thanks in advance.

Regards,

Janardan M

0 Janardan M over 7 years ago in reply to Janardan M

Expert 1115 points

HI,

Somebody please respond to my post or am I supposed to post my query as separate thread.

Thanks,

Janardan M

0 Rogerio Almeida over 7 years ago in reply to Janardan M

TI__Mastermind 26215 points

Janardan
Sorry for the delay...apps team will reply soon.

0 Rahul Prabhu over 7 years ago in reply to Rogerio Almeida

TI__Guru** 116170 points

Janardan,

Sorry for the delay in getting back to you on this issue. I was pinged on this issue by our business team as it appears this issue is partially resolved. Can you please indicate if you are still running into this issues with the frame sync and bit clock configuration or is the issue resolved at your end.

Regards,
Rahul

0 Janardan M over 7 years ago in reply to Rahul Prabhu

Expert 1115 points

Hi Rahul,

Thanks for the responce, the issue does not exist now, complete interface is up and working now.

I could interface Circular Microphone Board with GPEVMAM572x and get it working with Beamforming, AER and MSS algoriths.

Thanks,

Janardan M

0 Rahul Prabhu over 7 years ago in reply to Janardan M

TI__Guru** 116170 points

What was the root cause of the issue that you were seeing? Is there any bug in the driver configuration or setup or was this more of application level configuration that was causing this issue.

Let us know if there is any bug fixes that we need to track at our end.

Regards,
Rahul

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AM5728: McASP configuration