about EDMA 2D data copy

Hi,

from my point of view this is not possible directly on the DM642  (I think it would be possible on the DM648). According to spru234, there is only one FRMIDX/ELEIDX for both source and destination - so I think that they have to be identical. What about a linked transfer? The completion of each 'line' can trigger a new transfer automatically. I think in that case you are more flexible to specify the adress offsets between the transfers.

best regards,

Thomas

I think that linked transfer is a goog idea, but I can not trigger a linked edma transfer, the following is my code,
after I run EDMA_setChannel, it only can trigger the first edma transfer correctly, why? and do you give
me a linked transfer example code? Thanks.
EDMA_Config cfgEdmaY1 =
{ 
    //Making Options parameter register - EDMA_OPT
    EDMA_OPT_RMK
    (         
  EDMA_OPT_PRI_LOW,
     EDMA_OPT_ESIZE_32BIT,
     EDMA_OPT_2DS_YES,
     EDMA_OPT_SUM_INC,
     EDMA_OPT_2DD_NO,
     EDMA_OPT_DUM_INC,
     EDMA_OPT_TCINT_NO,
     EDMA_OPT_TCC_OF(TCCINTNUM_Y),
     EDMA_OPT_TCCM_OF(TCCINTNUM_Y >> 4),
     EDMA_OPT_ATCINT_NO,
     EDMA_OPT_ATCC_OF(0),
     EDMA_OPT_PDTS_DISABLE,
     EDMA_OPT_PDTD_DISABLE,
        EDMA_OPT_LINK_YES,
     EDMA_OPT_FS_YES
    ),
    EDMA_SRC_OF(fenc_buf),//Source address register
    EDMA_CNT_OF((15<<16)|4),   //Transfer count parameter
    EDMA_DST_OF(fenc_buf),      //Destination address parameter
    EDMA_IDX_OF(16<<16),//Index parameter
    EDMA_RLD_OF(0x00000000) //Count reload/link parameter
};                        

//Create the EDMA configuration structure for pong transfers
EDMA_Config cfgEdmaU1 =
{
    //Making Options parameter register - EDMA_OPT
    EDMA_OPT_RMK
    (     
  EDMA_OPT_PRI_LOW,       
  EDMA_OPT_ESIZE_32BIT,
     EDMA_OPT_2DS_YES,    
     EDMA_OPT_SUM_INC,
     EDMA_OPT_2DD_NO,   
     EDMA_OPT_DUM_INC,
     EDMA_OPT_TCINT_YES,
     EDMA_OPT_TCC_OF(TCCINTNUM_Y),
     EDMA_OPT_TCCM_OF(TCCINTNUM_Y >> 4),
     EDMA_OPT_ATCINT_NO,
     EDMA_OPT_ATCC_OF(0),
     EDMA_OPT_PDTS_DISABLE,
     EDMA_OPT_PDTD_DISABLE,
        EDMA_OPT_LINK_NO,
     EDMA_OPT_FS_YES
    ),
    EDMA_SRC_OF(fenc_buf),//Source address register
    EDMA_CNT_OF((7<<16)|2),   //Transfer count parameter
    EDMA_DST_OF(fenc_buf + 16*16),      //Destination address parameter
    EDMA_IDX_OF(16<<16),//Index parameter
    EDMA_RLD_OF(0x00000000) //Count reload/link parameter
};

hEdmaY = EDMA_open(TCCINTNUM_Y, EDMA_OPEN_RESET);
EDMA_intAlloc(TCCINTNUM_Y);

hEdmaU = EDMA_allocTable(-1);
hEdmaV = EDMA_allocTable(-1);

cfgEdmaY1.src = (unsigned int)(ext_y+32);
cfgEdmaY1.idx = (352-16)<<16;
cfgEdmaU1.src = (unsigned int)(ext_u+16);
cfgEdmaU1.idx = (176-8)<<16;

EDMA_config(hEdmaY, &cfgEdmaY1);
EDMA_config(hEdmaU, &cfgEdmaU1);

EDMA_link(hEdmaY, hEdmaU);

EDMA_intDisable(TCCINTNUM_Y);
EDMA_intClear(TCCINTNUM_Y); 
EDMA_intEnable(TCCINTNUM_Y);

EDMA_enableChannel(hEdmaY);
EDMA_setChannel(hEdmaY);

while(!EDMA_intTest(TCCINTNUM_Y));
EDMA_intClear(TCCINTNUM_Y);

Hi,

I dont have a sample for a linked transfer since I didnt use it on the DM642 up to now... I have moved to the DM648 and use the EDMA3. On the DM642 I didnt need different SRC and DST offsets between the tranfers.

But I thought that a linked transfer is triggered in the same way than a 'normal' transfer. First you setup the transfer. Then you (or a hardware EDMA event) triggers the first transfer. When the transfer is complete, EDMA automatically reloads the register and triggers the next transfer. Maybe my point of view is wrong in that...

What about the EDMA transfer complete ISR? When the first line is copied, the ISR is called. There you setup the transfer of the next 'line' and trigger the next transfer manually. You have some overhead for the ISR call after each line but maybe this is ok in your application...

bye,

Thomas