I am trying to move more EDMA/TCC channels to the DSP side so that my channel-hungry algorithm can work.
I tried to follow this guide:
http://processors.wiki.ti.com/index.php/Reconfiguring_EDMA_channel_allocation_on_ARM
however this is for a much older kernel than the one I have at the moment (from DVSDK 3.11.00.19). My question is, which file should I edit to give more EDMA channels to my DSP (DM6467)?
I have found DM646x.c in the kernel source with the DVSDK and this has some information that looks like it might be relevant however the resource allocations in that file do not match what I have in real life. For example, in this C file there is this interesting snippet of code:
static const s8 dm646x_dma_rsv_chans[][2] = {
/* (offset, length) */
{ 0, 4},
{13, 3},
{24, 4},
{30, 2},
{54, 3}, /* 16 total length */
{-1, -1}
};
static const s16 dm646x_dma_rsv_slots[][2] = {
/* (offset, length) */
{ 0, 4},
{13, 3},
{24, 4},
{30, 2},
{54, 3},
{128, 384}, /*400 total length */
{-1, -1}
};
When I actually see my DMA channels get allocated I see this (the channels are allocated in the order shown below):
{ 0, 4},
{13, 3},
{20, 14},
{46, 8},
{56, 8}, /* 37 total length */
{-1, -1}
This is also at odds with the information provided in the link I gave above.
Any suggestions of how/where I should be allocating my DMA channels in the kernel source?
Just what is dm646x_dma_rsv_slots? Something to do with PaRAMs?
Thanks,
Ralph