• State
  • Locked Locked
  • Replies 4 replies
  • Subscribers 98 subscribers
  • Views 281 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DM648 VideoPort raw data FIFO packing

Thomas9070
Expert 1575 points

Hi...,

I'm running first tests on a EVM648 and a camera connected to a VideoCapturePort (VP2.A) (8bit raw) through an own developed daughterCard. EDMA uses 64Bit transfers from videoport-FIFOs, so 8 Pixels are copied with one EDMA access from VP FIFO into DSPs memory.

Surprisingly, the Pixels are swapped, so I got 7-6-5-4-3-2-1-0-15-14-13-12-11-10-9-8. An image of an edge from the top left to the bottom right corner looks like this:



Running the same camera (in the same configuration) on a DM642, the pixels are not swapped. In the spruem1.pdf (DM648 videoport manual), the 'Raw Data FIFO Packing' is the same on DM642 and DM648. But in spru629.pdf (DM642 videoport manual) both 'little endian' and 'big endian' packing exist. Chapter 3.7.2 Raw Data FIFO Packing: "The packing and byte ordering is dependant upon the capture data size and the device endian  mode."

Is it possible to switch this endian-mode on the capture video port?

How can the 'device endian mode' be set or where can I look what 'endian mode' is used on my system?

How can I configure VP/EDMA in a way that the pixels are swapped (readout the same way on DM642 and DM648)

best regards,

Thomas

  • 0
    TI__Intellectual 2130 points

    Hi,

    Again responding on behalf of Sivaraj

    This is related to silicon errata in earlier DM648 silicon.

    In that version of DM648, the VPORT was working in big-endian mode whereas the rest of the chip is in little-endian mode.

    This is fixed in latest versions of DM648 Si

    Kindly refer to DM648 errata document.

    thanks

    regards

    sathya

  • 0 in reply to sathya2149
    TI__Mastermind 18130 points

    To add to what Sathya has mentioned, this is a direct result of Advisory 1.1.1 posted in the DM648 Silicon Errata. At least some of the DM648 DVSDK software uses a bit-swapping routine in software to workaround this.

    If you have the DVSDK installed you can find this routine in the psp_bios_vport_byte_swap.c file found inside the C:\dvsdk_1_10_00_XX_DM648\examples\common\evmDM648 folder.

  • 0 in reply to TimHarron
    Expert 1575 points

    Hi Tim and Sathya,

    Thanks - as you can imagine, I didnt read the errata pdf before posting (I thought that I had setup something wrong...). On the EVM648 there is a TMX rev. 1.0. At the moment I dont need the correct image data, I just write the basic functions like videoport setup and communication to the PC driver. On the PCI-board we are just about to design there will be a TMS Rev. 1.1 and image data with the correct endianess.

    best regards,

    Thomas

    P.S.: Yesterday on the embedded world exhibition in Nürnberg/Germany I talked to some of the TI guys about this forum. I also want to tell you that its a great help that there are TI guys posting answers to (sometimes "newbie") questions. What I experienced, the TI forum has improved a lot due to that in the last year - thanks for that...

  • 0 in reply to Thomas9070
    TI__Mastermind 18130 points

    Thomas,

    I am glad we are able to help. I like the concept of these community forums, so I will be here contributing when I can for the foreseeable future [:)]

    The byte-swapping is purely aesthetic and should have no performance/throughput impact on the system. This does mean that many algorithms (compression, color-space conversion, etc.) will not work properly, but if this is not required for now then you should be able to work through this until you get your design board done.