Hi,
I am working on EMAC on our own board. We have a EMAC driver code originally written for C6455, which is big-endian. I modified the code such as register addresses and similar things which are specific to DM6437.
We can send a ping packet currently, but the problem is that I get the content of the packet reversed.
When I check from Ethereal, packet has a content such as FF FF FF FF FF FF 00 1e 0b 31 b9 3b 08 06.....
But when I check my buffer in memory, it has: FF FF FF FF FF FF 31 0B 1E 00 06 08 3B B9.....
I don't know if this problem is an endianess problem, because code doesn't do any operation specific to an endian. It seems DMA writes the packet in reverse order to memory. Is there any register configuration related to this? Do you have any suggestions?
Thanks in advance,
Erman