Part Number: DRA712
Team
We are tring to display splash screen in U-Boot and our board use gpmc_adx.vout3_d (LCD3 DPI3) for display
Taken as referencehttp://www.ti.com/lit/an/sprac49/sprac49.pdf, we did the following PLL and DSS initialization, but display remains without any change (blank).
Could you provide any hint to help us.
__raw_writel(0x2, CM_DSS_CLKSTCTRL);
reg = __raw_readl(CTRL_CORE_CONTROL_IO_2);
__raw_writel((reg | 0x1), CTRL_CORE_CONTROL_IO_2);
reg = __raw_readl(CM_DSS_DSS_CLKCTRL);
reg = ((reg & ~0x00000003) | 0x00001100 | 0x2);
__raw_writel(reg, CM_DSS_DSS_CLKCTRL);
while ((__raw_readl(CM_DSS_DSS_CLKCTRL) & 0x00030000) != 0);
/* Enable DSS SCP Interface - DSI_CLK_CTRL.CIO_CLK_ICG */
reg = __raw_readl(DSI_CLK_CTRL);
_raw_writel((reg |= 0x00004001), DSI_CLK_CTRL);
/*2) Enable PLL programming in CTRL_CORE_DSS_PLL_CONTROL */
reg = __raw_readl(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE + CTRL_CORE_DSS_PLL_CONTROL);
reg &= ~(0x00000001); /* Enable VIDEO1 PLL */
reg |= (0x00000080); /* DSI 1C Clocksel */
_raw_writel(reg, SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE + CTRL_CORE_DSS_PLL_CONTROL);
/*3) DSI Power enable - DSI_CLK_CTRL.PLL_PWR_CMD */
reg = __raw_readl(DSI_CLK_CTRL);
reg |= 0x80000000;
_raw_writel(reg, DSI_CLK_CTRL);
/*PLLCTRL1 0x58004300*/
/*4) Check for PLL reset status - PLL_STATUS.PLLCTRL_RESET_DONE*/
while (((reg = __raw_readl(PLLCTRL1 + PLL_STATUS)) & 0x1) != 0x1)
udelay(1);
/* PLL_AUTOMODE = manual */
reg = __raw_readl(PLLCTRL1 + PLL_CONTROL);
reg &= 0xFFFFFFFE;
_raw_writel(reg, PLLCTRL1 + PLL_CONFIGURATION1);
/* DSS PLL Programming - CONFIGURATION1 */
_raw_writel(0x0000B2A4A, PLLCTRL1 + PLL_CONFIGURATION1);
/* DSS PLL Programming - CONFIGURATION2 */
_raw_writel(0x00E06008, PLLCTRL1 + PLL_CONFIGURATION2);
_raw_writel(0x00000012, PLLCTRL1 + PLL_CONFIGURATION3);
/* PLL_GO */
reg = __raw_readl(PLLCTRL1 + PLL_GO);
reg |= 0x1;
_raw_writel(reg, PLLCTRL1 + PLL_GO);
while (((reg = __raw_readl(PLLCTRL1 + PLL_GO)) & 0x1) != 0x0)
udelay(1);
/* M6 Clock Ack - Check before source selection */
while (((reg = __raw_readl(PLLCTRL1 + PLL_STATUS)) & 0x40) != 0x40)
udelay(1);
reg = __raw_readl(PLLCTRL1 + PLL_GO);
reg &= ~(0x00000001);
_raw_writel(reg, PLLCTRL1 + PLL_GO);
/* Set the LCD channel 0 clock polarity as falling edge */
__raw_writel(0x01610000, CTRL_CORE_SMA_SW_1);
/* DIVHS divider for DISPC */
reg = __raw_readl(CM_DIV_H12_DPLL_PER);
reg = ((reg & 0xfffffbc0) | 0x204u);
__raw_writel(reg, CM_DIV_H12_DPLL_PER);
/* DISPC Divisor to enable LCD */
__raw_writel(0x010001u, DISPC_DIVISOR);
/* DISPC_DIVISOR1 */
__raw_writel(0x010002u, DISPC_DIVISOR1);
/* enable_lcd1 channel output. Use DSS Clock for LCD */
__raw_writel(0x00080000u, 0x58000040);
/*My macro definition #define MY_RAW_WRITE(reg, value) __raw_writel(value, reg)*/
MY_RAW_WRITE(0x58001010, 0x00002015);
MY_RAW_WRITE(0x58001018, 0x00082000);
MY_RAW_WRITE(0x5800101C, 0x1E94564E);
MY_RAW_WRITE(0x58001040, 0x00018308);
MY_RAW_WRITE(0x58001044, 0x0000020C);
MY_RAW_WRITE(0x5800105C, 0x00000FFF);
MY_RAW_WRITE(0x58001064, 0x00300307);
MY_RAW_WRITE(0x58001068, 0x00100100);
MY_RAW_WRITE(0x5800106C, 0x00073000);
MY_RAW_WRITE(0x58001070, 0x00010002);
MY_RAW_WRITE(0x5800107C, 0x00000007);
MY_RAW_WRITE(0x5800108C, 0x01DF031F);
MY_RAW_WRITE(0x580010A0, 0x920040B9);
MY_RAW_WRITE(0x580010A4, 0x07FF07F8);
MY_RAW_WRITE(0x580010CC, 0x02808400);
MY_RAW_WRITE(0x58001130, 0x0199012A);
MY_RAW_WRITE(0x58001134, 0x012A0000);
MY_RAW_WRITE(0x58001138, 0x079C0730);
MY_RAW_WRITE(0x5800113C, 0x0000012A);
MY_RAW_WRITE(0x58001140, 0x00000205);
MY_RAW_WRITE(0x5800114C, 0x7FAC5000);
MY_RAW_WRITE(0x58001150, 0x7FAC5000);
MY_RAW_WRITE(0x58001158, 0x0028031F);
MY_RAW_WRITE(0x5800115C, 0x96A08419);
MY_RAW_WRITE(0x58001174, 0x0028031F);
MY_RAW_WRITE(0x58001180, 0x00800000);
MY_RAW_WRITE(0x58001184, 0x00800000);
MY_RAW_WRITE(0x58001188, 0x0E7DF601);
MY_RAW_WRITE(0x5800118C, 0x0E7DF6FE);
MY_RAW_WRITE(0x58001190, 0x2172F102);
MY_RAW_WRITE(0x58001194, 0x2172F1FA);
MY_RAW_WRITE(0x58001198, 0x3762F001);
MY_RAW_WRITE(0x5800119C, 0x3762F0F6);
MY_RAW_WRITE(0x580011A0, 0xF24E4EF2);
MY_RAW_WRITE(0x580011A4, 0xF24E4E00);
MY_RAW_WRITE(0x580011A8, 0xF06237F6);
MY_RAW_WRITE(0x580011AC, 0xF0623701);
MY_RAW_WRITE(0x580011B0, 0xF17221FA);
MY_RAW_WRITE(0x580011B4, 0xF1722102);
MY_RAW_WRITE(0x580011B8, 0xF67D0EFE);
MY_RAW_WRITE(0x580011BC, 0xF67D0E01);
MY_RAW_WRITE(0x580011C0, 0x0199012A);
MY_RAW_WRITE(0x580011C4, 0x012A0000);
MY_RAW_WRITE(0x580011C8, 0x079C0730);
MY_RAW_WRITE(0x580011CC, 0x0000012A);
MY_RAW_WRITE(0x580011D0, 0x00000205);
MY_RAW_WRITE(0x58001204, 0x0000FE01);
MY_RAW_WRITE(0x58001208, 0x0000FA02);
MY_RAW_WRITE(0x5800120C, 0x0000F601);
MY_RAW_WRITE(0x58001210, 0x000000F2);
MY_RAW_WRITE(0x58001214, 0x000001F6);
MY_RAW_WRITE(0x58001218, 0x000002FA);
MY_RAW_WRITE(0x5800121C, 0x000001FE);
MY_RAW_WRITE(0x5800122C, 0x000007FF);
MY_RAW_WRITE(0x58001230, 0x000007FF);
MY_RAW_WRITE(0x58001234, 0x000007FF);
MY_RAW_WRITE(0x58001238, 0x00000000);
MY_RAW_WRITE(0x58001370, 0x9AA08419);
MY_RAW_WRITE(0x58001374, 0x0199012A);
MY_RAW_WRITE(0x58001378, 0x012A0000);
MY_RAW_WRITE(0x5800137C, 0x079C0730);
MY_RAW_WRITE(0x58001380, 0x0000012A);
MY_RAW_WRITE(0x58001384, 0x00000205);
MY_RAW_WRITE(0x58001394, 0x01DF0041);
MY_RAW_WRITE(0x5800139C, 0x000002DE);
MY_RAW_WRITE(0x580013A0, 0x000007FF);
MY_RAW_WRITE(0x580013A4, 0x00000039);
MY_RAW_WRITE(0x580013A8, 0x01DF0041);
MY_RAW_WRITE(0x58001508, 0x00000000);
MY_RAW_WRITE(0x58001510, 0x00000000);
MY_RAW_WRITE(0x58001514, 0x00000000);
MY_RAW_WRITE(0x58001518, 0x00000000);
MY_RAW_WRITE(0x5800151C, 0x00000000);
MY_RAW_WRITE(0x58001520, 0x00000000);
MY_RAW_WRITE(0x58001524, 0x00000000);
MY_RAW_WRITE(0x58001528, 0x00000000);
MY_RAW_WRITE(0x5800152C, 0x00000000);
MY_RAW_WRITE(0x58001530, 0x00000000);
MY_RAW_WRITE(0x58001534, 0x00000000);
MY_RAW_WRITE(0x58001538, 0x00000000);
MY_RAW_WRITE(0x5800153C, 0x00000000);
MY_RAW_WRITE(0x58001540, 0x00000000);
MY_RAW_WRITE(0x58001544, 0x00000000);
MY_RAW_WRITE(0x58001548, 0x00000000);
MY_RAW_WRITE(0x5800154C, 0x00000000);
MY_RAW_WRITE(0x58001554, 0x00000000);
MY_RAW_WRITE(0x58001558, 0x00000000);
MY_RAW_WRITE(0x5800155C, 0x00000000);
MY_RAW_WRITE(0x58001560, 0x00000000);
MY_RAW_WRITE(0x58001564, 0x00000000);
MY_RAW_WRITE(0x58001568, 0x00000000);
MY_RAW_WRITE(0x5800156C, 0x00000000);
MY_RAW_WRITE(0x58001570, 0x00808000);
MY_RAW_WRITE(0x58001574, 0x00810042);
MY_RAW_WRITE(0x58001578, 0x00700019);
MY_RAW_WRITE(0x5800157C, 0x07EE07A2);
MY_RAW_WRITE(0x58001580, 0x07B607DA);
MY_RAW_WRITE(0x58001584, 0x00000070);
MY_RAW_WRITE(0x5800158C, 0x00080000);
MY_RAW_WRITE(0x58001594, 0x00000000);
MY_RAW_WRITE(0x580015A8, 0x00000000);
MY_RAW_WRITE(0x58001724, 0x04000400);
MY_RAW_WRITE(0x58001730, 0x00000000);
MY_RAW_WRITE(0x58001734, 0x00000000);
MY_RAW_WRITE(0x58001738, 0x00000000);
MY_RAW_WRITE(0x5800173C, 0x00000000);
MY_RAW_WRITE(0x58001740, 0x00000000);
MY_RAW_WRITE(0x58001744, 0x00000000);
MY_RAW_WRITE(0x58001748, 0x00000000);
MY_RAW_WRITE(0x5800174C, 0x00000000);
MY_RAW_WRITE(0x58001750, 0x00000000);
MY_RAW_WRITE(0x58001754, 0x00000000);
MY_RAW_WRITE(0x58001758, 0x00000000);
MY_RAW_WRITE(0x5800175C, 0x00000000);
MY_RAW_WRITE(0x58001760, 0x00000000);
MY_RAW_WRITE(0x58001764, 0x00000000);
MY_RAW_WRITE(0x58001768, 0x00000000);
MY_RAW_WRITE(0x5800176C, 0x00000000);
MY_RAW_WRITE(0x58001774, 0x00000000);
MY_RAW_WRITE(0x58001778, 0x00000000);
MY_RAW_WRITE(0x5800177C, 0x00000000);
MY_RAW_WRITE(0x58001780, 0x00000000);
MY_RAW_WRITE(0x58001784, 0x00000000);
MY_RAW_WRITE(0x58001788, 0x00000000);
MY_RAW_WRITE(0x5800178C, 0x00000000);
MY_RAW_WRITE(0x58001790, 0x04000400);
MY_RAW_WRITE(0x580017A0, 0x00000000);
MY_RAW_WRITE(0x580017A4, 0x00000000);
MY_RAW_WRITE(0x580017A8, 0x00000000);
MY_RAW_WRITE(0x580017AC, 0x00000000);
MY_RAW_WRITE(0x580017B0, 0x00000000);
MY_RAW_WRITE(0x580017B4, 0x00000000);
MY_RAW_WRITE(0x580017B8, 0x00000000);
MY_RAW_WRITE(0x580017BC, 0x00000000);
MY_RAW_WRITE(0x580017C0, 0x00000000);
MY_RAW_WRITE(0x580017C4, 0x00000000);
MY_RAW_WRITE(0x580017C8, 0x00000000);
MY_RAW_WRITE(0x580017CC, 0x00000000);
MY_RAW_WRITE(0x580017D0, 0x00000000);
MY_RAW_WRITE(0x580017D4, 0x00000000);
MY_RAW_WRITE(0x580017D8, 0x00000000);
MY_RAW_WRITE(0x580017DC, 0x00000000);
MY_RAW_WRITE(0x580017E4, 0x00000000);
MY_RAW_WRITE(0x580017E8, 0x00000000);
MY_RAW_WRITE(0x580017EC, 0x00000000);
MY_RAW_WRITE(0x580017F0, 0x00000000);
MY_RAW_WRITE(0x580017F4, 0x00000000);
MY_RAW_WRITE(0x580017F8, 0x00000000);
MY_RAW_WRITE(0x580017FC, 0x00000000);
MY_RAW_WRITE(0x58001800, 0x006D2264);
MY_RAW_WRITE(0x58001810, 0x00000000);
MY_RAW_WRITE(0x58001838, 0x00010002);
MY_RAW_WRITE(0x5800183C, 0x00067000);
MY_RAW_WRITE(0x58001844, 0x01F00D00);
MY_RAW_WRITE(0x58001848, 0x00000309);
MY_RAW_WRITE(0x5800184C, 0x00000000);
MY_RAW_WRITE(0x5800185C, 0x00000001);
MY_RAW_WRITE(0x58001860, 0x05000400);
MY_RAW_WRITE(0x58001864, 0x05000400);
MY_RAW_WRITE(0x58001868, 0x05000400);
MY_RAW_WRITE(0x5800186C, 0x05000400);
MY_RAW_WRITE(0x58001870, 0x03200280);
MY_RAW_WRITE(0x5800105C, 0x00000FFF);
MY_RAW_WRITE(0x58001834, 0x01DF031F);
MY_RAW_WRITE(0x58001840, 0x0270272F);
MY_RAW_WRITE(0x58001858, 0x00000001);
__raw_writel(address, (0x58001080);
__raw_writel(address, (0x58001084);
__raw_writel(address, DISPC_MACRO(BA_0));
__raw_writel(address, DISPC_MACRO(BA_1));
__raw_writel((address), DISPC_MACRO(BA_UV_0));
__raw_writel((address), DISPC_MACRO(BA_UV_1));
/* DISPC_VID1_ATTRIBUTES: enable the video */
reg = __raw_readl(DISPC_MACRO(ATTRIBUTES));
__raw_writel(reg | 0x1u, DISPC_MACRO(ATTRIBUTES));
reg = __raw_readl(DISPC_CONTROL1);
__raw_writel(reg | 0x21, DISPC_CONTROL1); /* DISPC_CONTROL1 */
Regards
