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Please see DDR RAM Interface below and evaluate DDR RAM interface possibility:
1. There are 2pcs 16bit-Data Bus DDR3 RAM(U59/U60: MT41K512M16HA-125 AIT) and 1pcs 8bit-DataBus DDR3 RAM(U63: MT41K512M8RH-125-AAT) on DDR Bank 1 based on DRA76xP_DRA77xP_TDA2Px-ACD CPU Board Schematic Rev C (Source).zip, it is very strange, DDR1_CS0 only need 2pcs 16bit data DDR RAM, it is seem to be unuseful for U63(MT41K512M8RH-125-AAT: 8bit Data bus DDR RAM) ;
2. There are 4pcs bit-Data Bus DDR3 RAM(U61/U62/U136/U137: MT41K512M8RH-125-AAT) on DDR Bank 2 based on above same schematics;
We will use 2pcs 16bit MT41K512M16HA-125 instead of MT41K512M8RH-125-AAT;
In summary, we will use 4pcs 16bit data bus same DDR RAM instead of 7pcs various DDR3 RAM;
Hi Joseph,
You are correct that the data bus of the EMIF is only 32-bits. However, U63 is connected to the ECC pins of EMIF1 as opposed to the data pins. Thus, U63 is still utilized when ECC is enabled.
You can use 2 x 16-bit memories on EMIF2.
Best regards,
Kevin