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A question about conditional branch

RexDSP
Prodigy 165 points

I met a error about branch instruction when debug, and I could find out the reason.

Enviroments is:  CCS 3.3  +  DM6446


[ Example A ]

  ;cycle 1
  MVK 1, A0          <--- Note: A0 is true
  ;cycle 2
  [A0] B mylabel
  ;cycle 3
  NOP
  ;cycle 4
  NOP
  ;cycle 5
  NOP
  ;cycle 6
  NOP
  ;cycle 7
  NOP
  ;cycle 8
  NOP
  ;cycle 9
  NOP
  ;cycle 10
  NOP

mylabel:
  ;cycle 11
  NOP
  ;cycle 12
  NOP

  The result is right when run this code, after "[A0] B mylabel" in cycle 2, the program is branch to cycle 11.
But the following code is wrong:


[ Example B ]

  ;cycle 1
  MVK 0, A0          <--- Note: A0 is false
  ;cycle 2
  [A0] B mylabel
  ;cycle 3
  NOP
  ;cycle 4
  NOP
  ;cycle 5
  NOP
  ;cycle 6
  NOP
  ;cycle 7
  NOP
  ;cycle 8
  NOP
  ;cycle 9
  NOP
  ;cycle 10
  NOP

mylabel:
  ;cycle 11
  NOP
  ;cycle 12
  NOP

  After the execute of "[A0] B mylabel", the program is branch to cycle 8. I think it should go to cycle 3
because A0 is false. Could you tell me the reason, and I cannot find out the answer within relative documents.


  Thinks a lot!

  • 0
    TI__Mastermind 18130 points

    I tried this out on several 64x+ boards (including DM6446) and could not replicate this behavior.

    The only curious thing about your problem is that cycle 8 is the first instruction after the 5 delay slots associated to the branch. I am not sure if this has anything to do with the behavior, but it could be a starting point to determining why you see what you see. My first thought was that the assembler was smart enough to remove these NOP statements as the branch will not ever pass, but I am not sure if this is the case.

    Are there any special build options you used? I am attaching my .out file which simply loads to the DSP's internal memory. Can you try it out and let me know if you see the same behavior? Just run to main and step through the disassembly window.

    branch.zip
  • 0 in reply to TimHarron
    Prodigy 165 points

    Hi, Tim Harron:

        I have tried your .out file, and see that you see.
        Now, I find out the answer which different method of debug cause different behavior:
        If debugging using step over (F10) will see that I said;

        If debugging using step into (F11) will see what you see.

        Thanks,

        zhouger