Linux: How to add MTD Partition for additional NAND Flash in Linux Device Tree for OMAPL138 SoC

Mitesh Hiran

Other Parts Discussed in Thread: OMAP-L132, OMAPL138

Tool/software: Linux

Hi there,

I have gone through the user guide on how to add partition and the link of the user guide is

I have made the changes in the device tree to add addition NAND Flash with different Chip Select (CS2) and different register. When I look at the following command after Linux boot up:

root@omapl138-lcdk:/proc/device-tree/aemif@68000000# ls -al
-r--r--r-- 1 root root 4 Jul 25 13:50 #address-cells
-r--r--r-- 1 root root 4 Jul 25 13:50 #size-cells
drwxr-xr-x 4 root root 0 Jul 25 13:50 .
drwxr-xr-x 11 root root 0 Jul 25 13:49 ..
-r--r--r-- 1 root root 15 Jul 25 13:50 compatible
drwxr-xr-x 3 root root 0 Jul 25 13:50 cs2
drwxr-xr-x 3 root root 0 Jul 25 13:50 cs3
-r--r--r-- 1 root root 6 Jul 25 13:50 name
-r--r--r-- 1 root root 4 Jul 25 13:50 pinctrl-0
-r--r--r-- 1 root root 8 Jul 25 13:50 pinctrl-names
-r--r--r-- 1 root root 32 Jul 25 13:50 ranges
-r--r--r-- 1 root root 8 Jul 25 13:50 reg
-r--r--r-- 1 root root 5 Jul 25 13:50 status
root@omapl138-lcdk:/proc/device-tree/aemif@68000000#

Does look like the nand flash cs2 has been created but can see it in the followinf MTD command:

root@omapl138-lcdk:/proc/device-tree/aemif@68000000# cat /proc/mtd
dev: size erasesize name
mtd0: 00020000 00020000 "u-boot env"
mtd1: 00080000 00020000 "u-boot"
mtd2: 1ff60000 00020000 "free space"

Do I need to add any other logic other than updating the device-tree and rebuild the kernel?

Please let me know. Thanks in advance.

The SDK version is 4.0.0.4

over 7 years ago

0 Mitesh Hiran over 7 years ago

Mastermind 6235 points

Below is the Device tree definition for NAND Flash: (part of da850-lcdk.dts)

&aemif {
pinctrl-names = "default";
pinctrl-0 = <&nand_pins>;
status = "okay";
cs2 {
#address-cells = <2>;
#size-cells = <1>;
clock-ranges;
ranges;

ti,cs-chipselect = <2>;

nand@0,0 {
compatible = "ti,davinci-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0 0x00000000 0x02000000
1 0x00000000 0x00008000>;

ti,davinci-chipselect = <1>;
ti,davinci-mask-ale = <0>;
ti,davinci-mask-cle = <0>;
ti,davinci-mask-chipsel = <0>;

ti,davinci-nand-buswidth = <16>;
ti,davinci-ecc-mode = "hw";
ti,davinci-ecc-bits = <4>;
ti,davinci-nand-use-bbt;

/*
* DSP Board has 2 NAND Flash. The CS2 NAND FLash
* is used for booting FPGA.
*/
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

partition@0 {
label = "FPGA FW";
reg = <0 0x200000>;
};
partition@0x400000 {
/* Extra partition */
label = "Spare";
reg = <0x0400000 0x0200000>;
};
};
};
};
cs3 {
#address-cells = <2>;
#size-cells = <1>;
clock-ranges;
ranges;

ti,cs-chipselect = <3>;

nand@2000000,0 {
compatible = "ti,davinci-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0 0x02000000 0x02000000
1 0x00000000 0x00008000>;

ti,davinci-chipselect = <1>;
ti,davinci-mask-ale = <0>;
ti,davinci-mask-cle = <0>;
ti,davinci-mask-chipsel = <0>;

ti,davinci-nand-buswidth = <16>;
ti,davinci-ecc-mode = "hw";
ti,davinci-ecc-bits = <4>;
ti,davinci-nand-use-bbt;

/*
* The OMAP-L132/L138 Bootloader doc SPRAB41E reads:
* "To boot from NAND Flash, the AIS should be written
* to NAND block 1 (NAND block 0 is not used by default)".
* The same doc mentions that for ROM "Silicon Revision 2.1",
* "Updated NAND boot mode to offer boot from block 0 or block 1".
* However the limitaion is left here by default for compatibility
* with older silicon and because it needs new boot pin settings
* not possible in stock LCDK.
*/
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

partition@0 {
label = "u-boot env";
reg = <0 0x020000>;
};
partition@0x020000 {
/* The LCDK defaults to booting from this partition */
label = "u-boot";
reg = <0x020000 0x080000>;
};
partition@0x0a0000 {
label = "free space";
reg = <0x0a0000 0>;
};
};
};
};
};

0 Mitesh Hiran over 7 years ago in reply to Mitesh Hiran

Mastermind 6235 points

Not sure why NAND Flasg CS2 is not filled in this iomem table:

root@omapl138-lcdk:/proc# cat iomem
01c00000-01c07fff : edma3_cc
01c14044-01c14047 : host1cfg
01c14110-01c1411b : /soc@1c00000/priority-controller@14110
01c14120-01c1416f : pinctrl-single
01c14174-01c1417b : chipsig
01c21000-01c21fff : /soc@1c00000/wdt@21000
01c40000-01c40fff : mmc0
01e20000-01e23fff : /soc@1c00000/ethernet@220000
01e24000-01e24fff : /soc@1c00000/mdio@224000
01e26000-01e26fff : /soc@1c00000/gpio@226000
01e30000-01e37fff : edma3_cc
11800000-1183ffff : l2sram
11e00000-11e07fff : l1pram
11f00000-11f07fff : l1dram
62000000-63ffffff : /aemif@68000000/cs3/nand@2000000,0
68000000-68007fff : /aemif@68000000
b0000000-b00000e7 : /memory-controller@b0000000
c0000000-c7ffffff : System RAM
c0008000-c05e6fff : Kernel code
c0620000-c069616f : Kernel data
root@omapl138-lcdk:/proc#

0 Mitesh Hiran over 7 years ago in reply to Mitesh Hiran

Mastermind 6235 points

More Log details:
log from
$> cat /var/volatile/log/syslog
...
May 11 10:09:50 omapl138-lcdk kernel: davinci_nand: probe of 60000000.nand failed with error -2
May 11 10:09:50 omapl138-lcdk kernel: nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xcc
May 11 10:09:50 omapl138-lcdk kernel: nand: Micron MT29F4G16ABADAH4
May 11 10:09:50 omapl138-lcdk kernel: nand: 512 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
May 11 10:09:50 omapl138-lcdk kernel: Bad block table not found for chip 0
May 11 10:09:51 omapl138-lcdk kernel: Bad block table not found for chip 0
May 11 10:09:51 omapl138-lcdk kernel: Scanning device for bad blocks
May 11 10:09:53 omapl138-lcdk ipsec[239]: charon too long to start... - kill kill
May 11 10:09:53 omapl138-lcdk ipsec[239]: charon has died -- restart scheduled (5sec)
May 11 10:09:54 omapl138-lcdk kernel: Bad block table written to 0x00001ffe0000, version 0x01
May 11 10:09:54 omapl138-lcdk kernel: Bad block table written to 0x00001ffc0000, version 0x01
May 11 10:09:54 omapl138-lcdk kernel: 3 ofpart partitions found on MTD device davinci-nand.0
May 11 10:09:54 omapl138-lcdk kernel: Creating 3 MTD partitions on "davinci-nand.0":
May 11 10:09:54 omapl138-lcdk kernel: 0x000000000000-0x000000020000 : "u-boot env"
May 11 10:09:54 omapl138-lcdk kernel: 0x000000020000-0x0000000a0000 : "u-boot"
May 11 10:09:54 omapl138-lcdk kernel: 0x0000000a0000-0x000020000000 : "free space"
May 11 10:09:54 omapl138-lcdk kernel: davinci_nand davinci-nand.0: controller rev. 2.5
May 11 10:09:57 omapl138-lcdk systemd[1]: Started Getty on tty1.
...

Could the error on probe of 60000000.nand be due to the fact we are using different wait pin for the NAND? (Using WAIT PIN 0 for CS3 and WAIT PIN 1 for CS2)

0 Yordan Kovachev over 7 years ago in reply to Mitesh Hiran

TI__Guru**** 161600 points

Can you share the aemif pinmux that you use? Also what happens if you commend the CS3 and leave only CS2?
Please share the full bootlogs.

Best Regards,
Yordan

0 Yordan Kovachev over 7 years ago in reply to Yordan Kovachev

TI__Guru**** 161600 points

Also share which Processor SDK Linux version is this.

0 Mitesh Hiran over 7 years ago in reply to Yordan Kovachev

Mastermind 6235 points

this is ti-processor-sdk-linux-omapl138-lcdk-04.00.00.04

0 Mitesh Hiran over 7 years ago in reply to Yordan Kovachev

Mastermind 6235 points

Hi,

Attached full log and device-tree files for pinmux details.

thanks.

Fullscreen 4544.da850.txt Download

/*
 * Copyright 2012 DENX Software Engineering GmbH
 * Heiko Schocher <hs@denx.de>
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	aliases {
		rproc0 = &dsp;
	};
	arm {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		intc: interrupt-controller@fffee000 {
			compatible = "ti,cp-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			ti,intc-size = <101>;
			reg = <0xfffee000 0x2000>;
		};
	};
	dsp: dsp@11800000 {
		compatible = "ti,da850-dsp";
		reg = <0x11800000 0x40000>,
		      <0x11e00000 0x8000>,
		      <0x11f00000 0x8000>,
		      <0x01c14044 0x4>,
		      <0x01c14174 0x8>;
		reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig";
		interrupt-parent = <&intc>;
		interrupts = <28>;
		status = "disabled";
	};
	soc@1c00000 {
		compatible = "simple-bus";
		model = "da850";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x01c00000 0x400000>;
		interrupt-parent = <&intc>;

		pmx_core: pinmux@14120 {
			compatible = "pinctrl-single";
			reg = <0x14120 0x50>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-single,bit-per-mux;
			pinctrl-single,register-width = <32>;
			pinctrl-single,function-mask = <0xf>;
			status = "disabled";

			serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
				pinctrl-single,bits = <
					/* UART0_RTS UART0_CTS */
					0x0c 0x22000000 0xff000000
				>;
			};
			serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
				pinctrl-single,bits = <
					/* UART0_TXD UART0_RXD */
					0x0c 0x00220000 0x00ff0000
				>;
			};
			serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
				pinctrl-single,bits = <
					/* UART1_CTS UART1_RTS */
					0x00 0x00440000 0x00ff0000
				>;
			};
			serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
				pinctrl-single,bits = <
					/* UART1_TXD UART1_RXD */
					0x10 0x22000000 0xff000000
				>;
			};
			serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
				pinctrl-single,bits = <
					/* UART2_CTS UART2_RTS */
					0x00 0x44000000 0xff000000
				>;
			};
			serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
				pinctrl-single,bits = <
					/* UART2_TXD UART2_RXD */
					0x10 0x00220000 0x00ff0000
				>;
			};
			i2c0_pins: pinmux_i2c0_pins {
				pinctrl-single,bits = <
					/* I2C0_SDA,I2C0_SCL */
					0x10 0x00002200 0x0000ff00
				>;
			};
			i2c1_pins: pinmux_i2c1_pins {
				pinctrl-single,bits = <
					/* I2C1_SDA, I2C1_SCL */
					0x10 0x00440000 0x00ff0000
				>;
			};
			mmc0_pins: pinmux_mmc_pins {
				pinctrl-single,bits = <
					/* MMCSD0_DAT[3] MMCSD0_DAT[2]
					 * MMCSD0_DAT[1] MMCSD0_DAT[0]
					 * MMCSD0_CMD    MMCSD0_CLK
					 */
					0x28 0x00222222  0x00ffffff
				>;
			};
			ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
				pinctrl-single,bits = <
					/* EPWM0A */
					0xc 0x00000002 0x0000000f
				>;
			};
			ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
				pinctrl-single,bits = <
					/* EPWM0B */
					0xc 0x00000020 0x000000f0
				>;
			};
			ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
				pinctrl-single,bits = <
					/* EPWM1A */
					0x14 0x00000002 0x0000000f
				>;
			};
			ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
				pinctrl-single,bits = <
					/* EPWM1B */
					0x14 0x00000020 0x000000f0
				>;
			};
			ecap0_pins: pinmux_ecap0_pins {
				pinctrl-single,bits = <
					/* ECAP0_APWM0 */
					0x8 0x20000000 0xf0000000
				>;
			};
			ecap1_pins: pinmux_ecap1_pins {
				pinctrl-single,bits = <
					/* ECAP1_APWM1 */
					0x4 0x40000000 0xf0000000
				>;
			};
			ecap2_pins: pinmux_ecap2_pins {
				pinctrl-single,bits = <
					/* ECAP2_APWM2 */
					0x4 0x00000004 0x0000000f
				>;
			};
			spi0_pins: pinmux_spi0_pins {
				pinctrl-single,bits = <
					/* SIMO, SOMI, CLK */
					0xc 0x00001101 0x0000ff0f
				>;
			};
			spi0_cs0_pin: pinmux_spi0_cs0 {
				pinctrl-single,bits = <
					/* CS0 */
					0x10 0x00000010 0x000000f0
				>;
			};
			spi1_pins: pinmux_spi1_pins {
				pinctrl-single,bits = <
					/* SIMO, SOMI, CLK */
					0x14 0x00110100 0x00ff0f00
				>;
			};
			spi1_cs0_pin: pinmux_spi1_cs0 {
				pinctrl-single,bits = <
					/* CS0 */
					0x14 0x00000010 0x000000f0
				>;
			};
			mdio_pins: pinmux_mdio_pins {
				pinctrl-single,bits = <
					/* MDIO_CLK, MDIO_D */
					0x10 0x00000088 0x000000ff
				>;
			};
			mii_pins: pinmux_mii_pins {
				pinctrl-single,bits = <
					/*
					 * MII_TXEN, MII_TXCLK, MII_COL
					 * MII_TXD_3, MII_TXD_2, MII_TXD_1
					 * MII_TXD_0
					 */
					0x8 0x88888880 0xfffffff0
					/*
					 * MII_RXER, MII_CRS, MII_RXCLK
					 * MII_RXDV, MII_RXD_3, MII_RXD_2
					 * MII_RXD_1, MII_RXD_0
					 */
					0xc 0x88888888 0xffffffff
				>;
			};
                        rmii_pins: pinmux_rmii_pins {
                                pinctrl-single,bits = <
                                        /*
                                         * RMII_TXD_1, RMII_TXD_0, RMII_TXEN
                                         * RMII_RXD_1, RMII_RXN_0, RMII_RXER
                                         */
                                         0x38 0x88888800 0xffffff00
                                        /*
                                         * RMII_MHZ_50_CLK, RMII_CRS_DV
                                         */
                                         0x3c 0x00000080 0x000000ff
                                >;
                        };
			lcd_pins: pinmux_lcd_pins {
				pinctrl-single,bits = <
					/*
					 * LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],
					 * LCD_D[6], LCD_D[7]
					 */
					0x40 0x22222200 0xffffff00
					/*
					 * LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13],
					 * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
					 */
					0x44 0x22222222 0xffffffff
					/* LCD_D[8], LCD_D[9] */
					0x48 0x00000022 0x000000ff

					/* LCD_PCLK */
					0x48 0x02000000 0x0f000000
					/* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */
					0x4c 0x02000022 0x0f0000ff
				>;
			};
			vpif_capture_pins: vpif_capture_pins {
				pinctrl-single,bits = <
					/* VP_DIN[2..7], VP_CLKIN1, VP_CLKIN0 */
					0x38 0x11111111 0xffffffff
					/* VP_DIN[10..15,0..1] */
					0x3c 0x11111111 0xffffffff
					/* VP_DIN[8..9] */
					0x40 0x00000011 0x000000ff
				>;
			};
			vpif_display_pins: vpif_display_pins {
				pinctrl-single,bits = <
					/* VP_DOUT[2..7] */
					0x40 0x11111100 0xffffff00
					/* VP_DOUT[10..15,0..1] */
					0x44 0x11111111 0xffffffff
					/*  VP_DOUT[8..9] */
					0x48 0x00000011 0x000000ff
					/*
					 * VP_CLKOUT3, VP_CLKIN3,
					 * VP_CLKOUT2, VP_CLKIN2
					 */
					0x4c 0x00111100 0x00ffff00
				>;
			};
		};
		prictrl: priority-controller@14110 {
			compatible = "ti,da850-mstpri";
			reg = <0x14110 0x0c>;
			status = "disabled";
		};
		cfgchip: chip-controller@1417c {
			compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
			reg = <0x1417c 0x14>;

			usb_phy: usb-phy {
				compatible = "ti,da830-usb-phy";
				#phy-cells = <1>;
				status = "disabled";
			};
		};
		edma0: edma@0 {
			compatible = "ti,edma3-tpcc";
			/* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
			reg =	<0x0 0x8000>;
			reg-names = "edma3_cc";
			interrupts = <11 12>;
			interrupt-names = "edma3_ccint", "edma3_ccerrint";
			#dma-cells = <2>;

			ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
			/* The following PaRAM slots are reserved: 13-15 and 31 */
			ti,edma-reserved-slot-ranges = <13 3>, <31 0>;
		};
		edma0_tptc0: tptc@8000 {
			compatible = "ti,edma3-tptc";
			reg =	<0x8000 0x400>;
			interrupts = <13>;
			interrupt-names = "edm3_tcerrint";
		};
		edma0_tptc1: tptc@8400 {
			compatible = "ti,edma3-tptc";
			reg =	<0x8400 0x400>;
			interrupts = <32>;
			interrupt-names = "edm3_tcerrint";
		};
		edma1: edma@230000 {
			compatible = "ti,edma3-tpcc";
			/* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
			reg =	<0x230000 0x8000>;
			reg-names = "edma3_cc";
			interrupts = <93 94>;
			interrupt-names = "edma3_ccint", "edma3_ccerrint";
			#dma-cells = <2>;

			ti,tptcs = <&edma1_tptc0 7>;
		};
		edma1_tptc0: tptc@238000 {
			compatible = "ti,edma3-tptc";
			reg =	<0x238000 0x400>;
			interrupts = <95>;
			interrupt-names = "edm3_tcerrint";
		};
		/*serial0: serial@42000 {
			compatible = "ti,da830-uart", "ns16550a";
			reg = <0x42000 0x100>;
			reg-io-width = <4>;
			reg-shift = <2>;
			interrupts = <25>;
			status = "disabled";
		};
		serial1: serial@10c000 {
			compatible = "ti,da830-uart", "ns16550a";
			reg = <0x10c000 0x100>;
			reg-io-width = <4>;
			reg-shift = <2>;
			interrupts = <53>;
			status = "disabled";
		};
		serial2: serial@10d000 {
			compatible = "ti,da830-uart", "ns16550a";
			reg = <0x10d000 0x100>;
			reg-io-width = <4>;
			reg-shift = <2>;
			interrupts = <61>;
			status = "disabled";
		};
		rtc0: rtc@23000 {
			compatible = "ti,da830-rtc";
			reg = <0x23000 0x1000>;
			interrupts = <19
				      19>;
			status = "disabled";
		};
		i2c0: i2c@22000 {
			compatible = "ti,davinci-i2c";
			reg = <0x22000 0x1000>;
			interrupts = <15>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};
		i2c1: i2c@228000 {
			compatible = "ti,davinci-i2c";
			reg = <0x228000 0x1000>;
			interrupts = <51>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};*/
		wdt: wdt@21000 {
			compatible = "ti,davinci-wdt";
			reg = <0x21000 0x1000>;
			status = "disabled";
		};
		mmc0: mmc@40000 {
			compatible = "ti,da830-mmc";
			reg = <0x40000 0x1000>;
			cap-sd-highspeed;
			cap-mmc-highspeed;
			interrupts = <16>;
			dmas = <&edma0 16 0>, <&edma0 17 0>;
			dma-names = "rx", "tx";
			status = "disabled";
		};
		/*vpif: video@217000 {
			compatible = "ti,da850-vpif";
			reg = <0x217000 0x1000>;
			interrupts = <92>;
			status = "disabled";*/

			/* VPIF capture port */
		/*	port@0 {
				#address-cells = <1>;
				#size-cells = <0>;
			};*/

			/* VPIF display port */
		/*	port@1 {
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};*/
		/*mmc1: mmc@21b000 {
			compatible = "ti,da830-mmc";
			reg = <0x21b000 0x1000>;
			cap-sd-highspeed;
			cap-mmc-highspeed;
			interrupts = <72>;
			dmas = <&edma1 28 0>, <&edma1 29 0>;
			dma-names = "rx", "tx";
			status = "disabled";
		};*/
		/*ehrpwm0: pwm@300000 {
			compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
				     "ti,am33xx-ehrpwm";
			#pwm-cells = <3>;
			reg = <0x300000 0x2000>;
			status = "disabled";
		};
		ehrpwm1: pwm@302000 {
			compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
				     "ti,am33xx-ehrpwm";
			#pwm-cells = <3>;
			reg = <0x302000 0x2000>;
			status = "disabled";
		};*/
		/*ecap0: ecap@306000 {
			compatible = "ti,da850-ecap", "ti,am3352-ecap",
				     "ti,am33xx-ecap";
			#pwm-cells = <3>;
			reg = <0x306000 0x80>;
			status = "disabled";
		};
		ecap1: ecap@307000 {
			compatible = "ti,da850-ecap", "ti,am3352-ecap",
				     "ti,am33xx-ecap";
			#pwm-cells = <3>;
			reg = <0x307000 0x80>;
			status = "disabled";
		};
		ecap2: ecap@308000 {
			compatible = "ti,da850-ecap", "ti,am3352-ecap",
				     "ti,am33xx-ecap";
			#pwm-cells = <3>;
			reg = <0x308000 0x80>;
			status = "disabled";
		};*/
		/*spi0: spi@41000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "ti,da830-spi";
			reg = <0x41000 0x1000>;
			num-cs = <6>;
			ti,davinci-spi-intr-line = <1>;
			interrupts = <20>;
			dmas = <&edma0 14 0>, <&edma0 15 0>;
			dma-names = "rx", "tx";
			status = "disabled";
		};
		spi1: spi@30e000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "ti,da830-spi";
			reg = <0x30e000 0x1000>;
			num-cs = <4>;
			ti,davinci-spi-intr-line = <1>;
			interrupts = <56>;
			dmas = <&edma0 18 0>, <&edma0 19 0>;
			dma-names = "rx", "tx";
			status = "disabled";
		};*/
		/*usb0: usb@200000 {
			compatible = "ti,da830-musb";
			reg = <0x200000 0x10000>;
			interrupts = <58>;
			interrupt-names = "mc";
			dr_mode = "otg";
			phys = <&usb_phy 0>;
			phy-names = "usb-phy";
			status = "disabled";
		};
		sata: sata@218000 {
			compatible = "ti,da850-ahci";
			reg = <0x218000 0x2000>, <0x22c018 0x4>;
			interrupts = <67>;
			status = "disabled";
		};*/
		mdio: mdio@224000 {
			compatible = "ti,davinci_mdio";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x224000 0x1000>;
			status = "disabled";
		};
		eth0: ethernet@220000 {
			compatible = "ti,davinci-dm6467-emac";
			reg = <0x220000 0x4000>;
			ti,davinci-ctrl-reg-offset = <0x3000>;
			ti,davinci-ctrl-mod-reg-offset = <0x2000>;
			ti,davinci-ctrl-ram-offset = <0>;
			ti,davinci-ctrl-ram-size = <0x2000>;
                        ti,davinci-rmii-en = /bits/ 8 <1>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <33
					34
					35
					36
					>;
			status = "disabled";
		};
		/*usb1: usb@225000 {
			compatible = "ti,da830-ohci";
			reg = <0x225000 0x1000>;
			interrupts = <59>;
			phys = <&usb_phy 1>;
			phy-names = "usb-phy";
			status = "disabled";
		};*/
		gpio: gpio@226000 {
			compatible = "ti,dm6441-gpio";
			gpio-controller;
			#gpio-cells = <2>;
			reg = <0x226000 0x1000>;
			interrupts = <42 IRQ_TYPE_EDGE_BOTH
				43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH
				45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH
				47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH
				49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;
			ti,ngpio = <144>;
			ti,davinci-gpio-unbanked = <0>;
			status = "disabled";
		};
		pinconf: pin-controller@22c00c {
			compatible = "ti,da850-pupd";
			reg = <0x22c00c 0x8>;
			status = "disabled";
		};

		/*mcasp0: mcasp@100000 {
			compatible = "ti,da830-mcasp-audio";
			reg = <0x100000 0x2000>,
			      <0x102000 0x400000>;
			reg-names = "mpu", "dat";
			interrupts = <54>;
			interrupt-names = "common";
			status = "disabled";
			dmas = <&edma0 1 1>,
				<&edma0 0 1>;
			dma-names = "tx", "rx";
		};*/

		/*lcdc: display@213000 {
			compatible = "ti,da850-tilcdc";
			reg = <0x213000 0x1000>;
			interrupts = <52>;
			max-pixelclock = <37500>;
			status = "disabled";
		};*/
	};
	aemif: aemif@68000000 {
		compatible = "ti,da850-aemif";
		#address-cells = <2>;
		#size-cells = <1>;

		reg = <0x68000000 0x00008000>;
		ranges = <0 0 0x60000000 0x08000000
			  1 0 0x68000000 0x00008000>;
		status = "disabled";
	};
	memctrl: memory-controller@b0000000 {
		compatible = "ti,da850-ddr-controller";
		reg = <0xb0000000 0xe8>;
		status = "disabled";
	};
};

Fullscreen 8081.da850-lcdk.txt Download

/*
 * Copyright (c) 2016 BayLibre, Inc.
 *
 * Licensed under GPLv2.
 */
/dts-v1/;
#include "da850.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	model = "DA850/AM1808/OMAP-L138 LCDK";
	compatible = "ti,da850-lcdk", "ti,da850";

	aliases {
		/*serial2 = &serial2;*/
		ethernet0 = &eth0;
	};

	/*chosen {
		stdout-path = "serial2:115200n8";
	};*/

	memory {
		device_type = "memory";
		reg = <0xc0000000 0x08000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		dsp_cma_pool: dsp_cma@c3000000 {
			compatible = "shared-dma-pool";
			reg = <0xc3000000 0x2000000>;
			reusable;
			status = "okay";
		};

	};

	/*sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "DA850/OMAP-L138 LCDK";
		simple-audio-card,widgets =
			"Line", "Line In",
			"Line", "Line Out";
		simple-audio-card,routing =
			"LINE1L", "Line In",
			"LINE1R", "Line In",
			"Line Out", "LLOUT",
			"Line Out", "RLOUT";
		simple-audio-card,format = "dsp_b";
		simple-audio-card,bitclock-master = <&link0_codec>;
		simple-audio-card,frame-master = <&link0_codec>;
		simple-audio-card,bitclock-inversion;

		simple-audio-card,cpu {
			sound-dai = <&mcasp0>;
			system-clock-frequency = <24576000>;
		};

		link0_codec: simple-audio-card,codec {
			sound-dai = <&tlv320aic3106>;
			system-clock-frequency = <24576000>;
		};
	};*/

	/*gpio-keys {
		compatible = "gpio-keys";
		autorepeat;

		user1 {
			label = "GPIO Key USER1";
			linux,code = <BTN_0>;
			gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
		};

		user2 {
			label = "GPIO Key USER2";
			linux,code = <BTN_1>;
			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
		};
	};*/

/*	vga-bridge {
		compatible = "ti,ths8135";
		#address-cells = <1>;
		#size-cells = <0>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				vga_bridge_in: endpoint {
					remote-endpoint = <&lcdc_out_vga>;
				};
			};

			port@1 {
				reg = <1>;

				vga_bridge_out: endpoint {
					remote-endpoint = <&vga_con_in>;
				};
			};
		};
	};

	vga {
		compatible = "vga-connector";

		ddc-i2c-bus = <&i2c0>;

		port {
			vga_con_in: endpoint {
				remote-endpoint = <&vga_bridge_out>;
			};
		};
	};*/
};

&pmx_core {
	status = "okay";

       /* mcasp0_pins: pinmux_mcasp0_pins {
		pinctrl-single,bits = <*/
			/* AHCLKX AFSX ACLKX */
			/*0x00 0x00101010 0x00f0f0f0*/
			/* ARX13 ARX14 */
			/*0x04 0x00000110 0x00000ff0
		>;
	};*/

	nand_pins: nand_pins {
		pinctrl-single,bits = <
                        /* EMA_WAIT[1] */
			0x18 0x01000000  0x0f000000

			/* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3], EMA_CS[2] */
			0x1c 0x10110011  0xf0ff00ff
			/*
			 * EMA_D[0], EMA_D[1], EMA_D[2],
			 * EMA_D[3], EMA_D[4], EMA_D[5],
			 * EMA_D[6], EMA_D[7]
			 */
			0x24 0x11111111  0xffffffff
			/*
			 * EMA_D[8],  EMA_D[9],  EMA_D[10],
			 * EMA_D[11], EMA_D[12], EMA_D[13],
			 * EMA_D[14], EMA_D[15]
			 */
			0x20 0x11111111  0xffffffff
			/* EMA_A[1], EMA_A[2] */
			0x30 0x01100000  0x0ff00000
		>;
	};
};

/*&serial2 {
	pinctrl-names = "default";
	pinctrl-0 = <&serial2_rxtx_pins>;
	status = "okay";
};*/

&wdt {
	status = "okay";
};

/*&rtc0 {
	status = "okay";
};*/

&gpio {
	status = "okay";
};

/*&sata {
	status = "disabled";
};*/

&mdio {
	pinctrl-names = "default";
	pinctrl-0 = <&mdio_pins>;
	bus_freq = <2200000>;
	status = "okay";
};

&eth0 {
	pinctrl-names = "default";
	pinctrl-0 = <&rmii_pins>;
        phy-mode = "rmii";
        phy-connection-type = "rmii";
	status = "okay";
};

&mmc0 {
	max-frequency = <50000000>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc0_pins>;
	cd-gpios = <&gpio 65 GPIO_ACTIVE_LOW>;
	status = "okay";
};

/*&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	clock-frequency = <100000>;
	status = "okay";

	tlv320aic3106: tlv320aic3106@18 {
		#sound-dai-cells = <0>;
		compatible = "ti,tlv320aic3106";
		reg = <0x18>;
		status = "okay";
	};
};*/

/*&mcasp0 {
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&mcasp0_pins>;
	status = "disabled";*/

	/*op-mode = <0>; */  /* DAVINCI_MCASP_IIS_MODE */
	/*tdm-slots = <2>;*/
	/*serial-dir = <*/   /* 0: INACTIVE, 1: TX, 2: RX */
		/*0 0 0 0
		0 0 0 0
		0 0 0 0
		0 1 2 0
	>;
	tx-num-evt = <32>;
	rx-num-evt = <32>;
};*/

/*&usb_phy {
	status = "okay";
};*/

/*&usb0 {
	status = "okay";
};*/

/*&usb1 {
	status = "okay";
};*/

&aemif {
	pinctrl-names = "default";
	pinctrl-0 = <&nand_pins>;
	status = "okay";
        cs2 {
		#address-cells = <2>;
		#size-cells = <1>;
		clock-ranges;
		ranges;

		ti,cs-chipselect = <2>;

		nand@0,0 {
			compatible = "ti,davinci-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0 0x00000000 0x02000000
			       1 0x00000000 0x00008000>;

			ti,davinci-chipselect = <1>;
			ti,davinci-mask-ale = <0>;
			ti,davinci-mask-cle = <0>;
			ti,davinci-mask-chipsel = <0>;

			ti,davinci-nand-buswidth = <16>;
			ti,davinci-ecc-mode = "hw";
			ti,davinci-ecc-bits = <4>;
			ti,davinci-nand-use-bbt;

			/*
			 * DSP Board has 2 NAND Flash. The CS2 NAND FLash
                         * is used for booting FPGA.
			 */
			partitions {
				compatible = "fixed-partitions";
				#address-cells = <1>;
				#size-cells = <1>;

				partition@0 {
					label = "FPGA FW";
					reg = <0 0x200000>;
				};
				partition@0x400000 {
					/* Extra partition */
					label = "Spare";
					reg = <0x0400000 0x0200000>;
				};				
			};
		};
	};
	cs3 {
		#address-cells = <2>;
		#size-cells = <1>;
		clock-ranges;
		ranges;

		ti,cs-chipselect = <3>;

		nand@2000000,0 {
			compatible = "ti,davinci-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0 0x02000000 0x02000000
			       1 0x00000000 0x00008000>;

			ti,davinci-chipselect = <1>;
			ti,davinci-mask-ale = <0>;
			ti,davinci-mask-cle = <0>;
			ti,davinci-mask-chipsel = <0>;

			ti,davinci-nand-buswidth = <16>;
			ti,davinci-ecc-mode = "hw";
			ti,davinci-ecc-bits = <4>;
			ti,davinci-nand-use-bbt;

			/*
			 * The OMAP-L132/L138 Bootloader doc SPRAB41E reads:
			 * "To boot from NAND Flash, the AIS should be written
			 * to NAND block 1 (NAND block 0 is not used by default)".
			 * The same doc mentions that for ROM "Silicon Revision 2.1",
			 * "Updated NAND boot mode to offer boot from block 0 or block 1".
			 * However the limitaion is left here by default for compatibility
			 * with older silicon and because it needs new boot pin settings
			 * not possible in stock LCDK.
			 */
			partitions {
				compatible = "fixed-partitions";
				#address-cells = <1>;
				#size-cells = <1>;

				partition@0 {
					label = "u-boot env";
					reg = <0 0x020000>;
				};
				partition@0x020000 {
					/* The LCDK defaults to booting from this partition */
					label = "u-boot";
					reg = <0x020000 0x080000>;
				};
				partition@0x0a0000 {
					label = "free space";
					reg = <0x0a0000 0>;
				};
			};
		};
	};
};

&prictrl {
	status = "okay";
};

&memctrl {
	status = "okay";
};

/*&lcdc {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&lcd_pins>;

	port {
		lcdc_out_vga: endpoint {
			remote-endpoint = <&vga_bridge_in>;
		};
	};
};*/

/*&vpif {
	pinctrl-names = "default";
	pinctrl-0 = <&vpif_capture_pins>;
	status = "disabled";*/

	/* VPIF capture port */
/*	port {
		vpif_ch0: endpoint {
			  bus-width = <8>;
		};
	};
};*/

&dsp {
	status = "okay";
        memory-region = <&dsp_cma_pool>;
};

Fullscreen syslog.txt Download

May 11 10:09:46 omapl138-lcdk syslog-ng[146]: syslog-ng starting up; version='3.5.4.1'
May 11 10:09:37 omapl138-lcdk systemd[1]: Starting Network Name Resolution...
May 11 10:09:46 omapl138-lcdk syslogd[190]: syslogd: read from /dev/log: Resource temporarily unavailable
May 11 10:09:37 omapl138-lcdk systemd-timesyncd[99]: Network configuration changed, trying to establish connection.
May 11 10:09:38 omapl138-lcdk systemd[1]: Starting thttpd.service...
May 11 10:09:39 omapl138-lcdk systemd-networkd[184]: eth0: Gained IPv6LL
May 11 10:09:39 omapl138-lcdk systemd[1]: Started Run Coda Octopus startup scripts.
May 11 10:09:39 omapl138-lcdk systemd[1]: Started Permit User Sessions.
May 11 10:09:40 omapl138-lcdk systemd-resolved[243]: Positive Trust Anchors:
May 11 10:09:40 omapl138-lcdk systemd[1]: Started Lightning Fast Webserver With Light System Requirements.
May 11 10:09:40 omapl138-lcdk systemd-resolved[243]: . IN DS 19036 8 2 49aac11d7b6f6446702e54a1607371607a1a41855200fd2ce1cdde32f24e8fb5
May 11 10:09:40 omapl138-lcdk systemd-resolved[243]: Negative trust anchors: 10.in-addr.arpa 16.172.in-addr.arpa 17.172.in-addr.arpa 18.172.in-addr.arpa 19.172.in-addr.arpa 20.172.in-addr.arpa 21.172.in-addr.arpa 22.172.in-addr.arpa 23.172.in-addr.arpa 24.172.in-addr.arpa 25.172.in-addr.arpa 26.172.in-addr.arpa 27.172.in-addr.arpa 28.172.in-addr.arpa 29.172.in-addr.arpa 30.172.in-addr.arpa 31.172.in-addr.arpa 168.192.in-addr.arpa corp home internal intranet lan local private test
May 11 10:09:40 omapl138-lcdk systemd-resolved[243]: Using system hostname 'omapl138-lcdk'.
May 11 10:09:40 omapl138-lcdk systemd-networkd[184]: eth0: Configured
May 11 10:09:40 omapl138-lcdk systemd-timesyncd[99]: Network configuration changed, trying to establish connection.
May 11 10:09:42 omapl138-lcdk systemd[1]: Started Network Name Resolution.
May 11 10:09:42 omapl138-lcdk systemd[1]: Started thttpd.service.
May 11 10:09:42 omapl138-lcdk systemd[1]: Started Login Service.
May 11 10:09:43 omapl138-lcdk systemd[1]: Starting rng-tools.service...
May 11 10:09:44 omapl138-lcdk systemd[1]: Started Getty on tty1.
May 11 10:09:44 omapl138-lcdk systemd[1]: Reached target Login Prompts.
May 11 10:09:45 omapl138-lcdk systemd[1]: Started rng-tools.service.
May 11 10:09:46 omapl138-lcdk systemd[1]: busybox-syslog.service: Main process exited, code=exited, status=128/n/a
May 11 10:09:46 omapl138-lcdk systemd[1]: busybox-syslog.service: Unit entered failed state.
May 11 10:09:46 omapl138-lcdk systemd[1]: busybox-syslog.service: Failed with result 'exit-code'.
May 11 10:09:48 omapl138-lcdk snmpd[217]: NET-SNMP version 5.7.3
May 11 10:09:48 omapl138-lcdk systemd[1]: Started Simple Network Management Protocol (SNMP) Daemon..
May 11 10:09:51 omapl138-lcdk kernel: davinci_nand: probe of 60000000.nand failed with error -2
May 11 10:09:51 omapl138-lcdk kernel: nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xcc
May 11 10:09:51 omapl138-lcdk kernel: nand: Micron MT29F4G16ABADAH4
May 11 10:09:51 omapl138-lcdk kernel: nand: 512 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
May 11 10:09:51 omapl138-lcdk kernel: Bad block table not found for chip 0
May 11 10:09:52 omapl138-lcdk kernel: Bad block table not found for chip 0
May 11 10:09:52 omapl138-lcdk kernel: Scanning device for bad blocks
May 11 10:09:52 omapl138-lcdk ipsec[210]: charon too long to start... - kill kill
May 11 10:09:52 omapl138-lcdk ipsec[210]: charon has died -- restart scheduled (5sec)
May 11 10:09:54 omapl138-lcdk kernel: Bad block table written to 0x00001ffe0000, version 0x01
May 11 10:09:54 omapl138-lcdk kernel: Bad block table written to 0x00001ffc0000, version 0x01
May 11 10:09:54 omapl138-lcdk kernel: 3 ofpart partitions found on MTD device davinci-nand.0
May 11 10:09:54 omapl138-lcdk kernel: Creating 3 MTD partitions on "davinci-nand.0":
May 11 10:09:54 omapl138-lcdk kernel: 0x000000000000-0x000000020000 : "u-boot env"
May 11 10:09:54 omapl138-lcdk kernel: 0x000000020000-0x0000000a0000 : "u-boot"
May 11 10:09:54 omapl138-lcdk kernel: 0x0000000a0000-0x000020000000 : "free space"
May 11 10:09:54 omapl138-lcdk kernel: davinci_nand davinci-nand.0: controller rev. 2.5
May 11 10:09:58 omapl138-lcdk charon: 00[DMN] Starting IKE charon daemon (strongSwan 5.5.0, Linux 4.9.28-geed43d1050, armv5tejl)
May 11 10:09:58 omapl138-lcdk systemd[1]: Created slice system-dropbear.slice.
May 11 10:09:58 omapl138-lcdk charon: 00[CFG] opening PKCS#11 library failed: /usr/lib/softhsm/libsecstore.so.1: cannot open shared object file: No such file or directory
May 11 10:09:58 omapl138-lcdk systemd[1]: Started SSH Per-Connection Server (192.168.254.49:57782).
May 11 10:09:58 omapl138-lcdk systemd[1]: Started SSH Per-Connection Server (192.168.254.49:57781).
May 11 10:09:58 omapl138-lcdk systemd[1]: Starting SYSV: The kdump script provides the support:...
May 11 10:09:59 omapl138-lcdk kdump[415]: No makedumpfile found.
May 11 10:09:59 omapl138-lcdk kdump[415]: Kdump isn't supported on the running kernel,please check boot option!!!
May 11 10:09:59 omapl138-lcdk kdump: Kdump isn't supported on the running kernel,please check boot option!!!
May 11 10:09:59 omapl138-lcdk systemd[1]: kdump.service: Control process exited, code=exited status=1
May 11 10:09:59 omapl138-lcdk systemd[1]: Failed to start SYSV: The kdump script provides the support:.
May 11 10:09:59 omapl138-lcdk systemd[1]: kdump.service: Unit entered failed state.
May 11 10:09:59 omapl138-lcdk systemd[1]: kdump.service: Failed with result 'exit-code'.
May 11 10:10:00 omapl138-lcdk systemd[1]: Starting matrix-gui-2.0.service...
May 11 10:10:00 omapl138-lcdk matrix-gui-2.0[446]: /etc/init.d/matrix-gui-2.0: line 12: /etc/profile.d/*.sh: No such file or directory
May 11 10:10:00 omapl138-lcdk systemd[1]: matrix-gui-2.0.service: Control process exited, code=exited status=1
May 11 10:10:00 omapl138-lcdk systemd[1]: Failed to start matrix-gui-2.0.service.
May 11 10:10:00 omapl138-lcdk systemd[1]: matrix-gui-2.0.service: Unit entered failed state.
May 11 10:10:00 omapl138-lcdk systemd[1]: matrix-gui-2.0.service: Failed with result 'exit-code'.
May 11 10:10:00 omapl138-lcdk systemd[1]: Starting thermal-zone-init.service...
May 11 10:10:00 omapl138-lcdk thermal-zone-init[455]: Enabling thermal zones...
May 11 10:10:00 omapl138-lcdk thermal-zone-init[455]: /etc/init.d/thermal-zone-init: line 11: /sys/class/thermal/thermal_zone*/mode: No such file or directory
May 11 10:10:01 omapl138-lcdk systemd[1]: Started thermal-zone-init.service.
May 11 10:10:01 omapl138-lcdk systemd[1]: Reached target Multi-User System.
May 11 10:10:01 omapl138-lcdk systemd[1]: Starting Update UTMP about System Runlevel Changes...
May 11 10:10:01 omapl138-lcdk systemd[1]: Started Update UTMP about System Runlevel Changes.
May 11 10:10:01 omapl138-lcdk systemd[1]: Startup finished in 1.469s (kernel) + 45.881s (userspace) = 47.351s.
May 11 10:10:04 omapl138-lcdk charon: 00[KNL] unable to create netlink socket: Protocol not supported (93)
May 11 10:10:04 omapl138-lcdk charon: 00[NET] installing IKE bypass policy failed
May 11 10:10:04 omapl138-lcdk charon: 00[NET] installing IKE bypass policy failed
May 11 10:10:04 omapl138-lcdk charon: 00[NET] enabling UDP decapsulation for IPv6 on port 4500 failed
May 11 10:10:04 omapl138-lcdk charon: 00[NET] installing IKE bypass policy failed
May 11 10:10:04 omapl138-lcdk charon: 00[NET] installing IKE bypass policy failed
May 11 10:10:04 omapl138-lcdk charon: 00[NET] enabling UDP decapsulation for IPv4 on port 4500 failed
May 11 10:10:04 omapl138-lcdk charon: 00[LIB] feature CUSTOM:libcharon in critical plugin 'charon' has unmet dependency: CUSTOM:kernel-ipsec
May 11 10:10:04 omapl138-lcdk charon: 00[KNL] received netlink error: Operation not supported (95)
May 11 10:10:04 omapl138-lcdk charon: 00[KNL] unable to create IPv4 routing table rule
May 11 10:10:04 omapl138-lcdk charon: 00[KNL] received netlink error: Operation not supported (95)
May 11 10:10:04 omapl138-lcdk charon: 00[KNL] unable to create IPv6 routing table rule
May 11 10:10:04 omapl138-lcdk charon: 00[CFG] loading ca certificates from '/etc/ipsec.d/cacerts'
May 11 10:10:04 omapl138-lcdk charon: 00[CFG] loading aa certificates from '/etc/ipsec.d/aacerts'
May 11 10:10:04 omapl138-lcdk charon: 00[CFG] loading ocsp signer certificates from '/etc/ipsec.d/ocspcerts'
May 11 10:10:04 omapl138-lcdk charon: 00[CFG] loading attribute certificates from '/etc/ipsec.d/acerts'
May 11 10:10:04 omapl138-lcdk charon: 00[CFG] loading crls from '/etc/ipsec.d/crls'
May 11 10:10:04 omapl138-lcdk charon: 00[CFG] loading secrets from '/etc/ipsec.secrets'
May 11 10:10:04 omapl138-lcdk charon: 00[CFG] opening secrets file '/etc/ipsec.secrets' failed: No such file or directory
May 11 10:10:04 omapl138-lcdk charon: 00[LIB] failed to load 1 critical plugin feature
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[DMN] Starting IKE charon daemon (strongSwan 5.5.0, Linux 4.9.28-geed43d1050, armv5tejl)
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[CFG] opening PKCS#11 library failed: /usr/lib/softhsm/libsecstore.so.1: cannot open shared object file: No such file or directory
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[KNL] unable to create netlink socket: Protocol not supported (93)
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[NET] installing IKE bypass policy failed
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[NET] installing IKE bypass policy failed
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[NET] enabling UDP decapsulation for IPv6 on port 4500 failed
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[NET] installing IKE bypass policy failed
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[NET] installing IKE bypass policy failed
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[NET] enabling UDP decapsulation for IPv4 on port 4500 failed
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[LIB] feature CUSTOM:libcharon in critical plugin 'charon' has unmet dependency: CUSTOM:kernel-ipsec
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[KNL] received netlink error: Operation not supported (95)
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[KNL] unable to create IPv4 routing table rule
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[KNL] received netlink error: Operation not supported (95)
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[KNL] unable to create IPv6 routing table rule
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[CFG] loading ca certificates from '/etc/ipsec.d/cacerts'
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[CFG] loading aa certificates from '/etc/ipsec.d/aacerts'
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[CFG] loading ocsp signer certificates from '/etc/ipsec.d/ocspcerts'
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[CFG] loading attribute certificates from '/etc/ipsec.d/acerts'
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[CFG] loading crls from '/etc/ipsec.d/crls'
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[CFG] loading secrets from '/etc/ipsec.secrets'
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[CFG] opening secrets file '/etc/ipsec.secrets' failed: No such file or directory
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[LIB] failed to load 1 critical plugin feature
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[DMN] initialization failed - aborting charon
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[KNL] received netlink error: Operation not supported (95)
May 11 10:10:05 omapl138-lcdk ipsec[210]: 00[KNL] received netlink error: Operation not supported (95)
May 11 10:10:04 omapl138-lcdk charon: 00[DMN] initialization failed - aborting charon
May 11 10:10:05 omapl138-lcdk ipsec[210]: charon has quit: initialization failed
May 11 10:10:05 omapl138-lcdk ipsec[210]: charon refused to be started
May 11 10:10:05 omapl138-lcdk ipsec[210]: ipsec starter stopped
May 11 10:10:04 omapl138-lcdk charon: 00[KNL] received netlink error: Operation not supported (95)
May 11 10:10:04 omapl138-lcdk charon: 00[KNL] received netlink error: Operation not supported (95)
Jul 26 08:14:05 omapl138-lcdk systemd[1]: Time has been changed
Jul 26 08:14:05 omapl138-lcdk bash[222]: Thu Jul 26 08:14:05 UTC 2018
Jul 26 08:14:08 omapl138-lcdk thttpd[277]: up 6559468 seconds, stats for 6559468 seconds:
Jul 26 08:14:08 omapl138-lcdk thttpd[277]:   thttpd - 0 connections (0/sec), 0 max simultaneous, 0 bytes (0/sec), 0 httpd_conns allocated
Jul 26 08:14:08 omapl138-lcdk thttpd[277]:   map cache - 0 allocated, 0 active (0 bytes), 0 free; hash size: 0; expire age: 750
Jul 26 08:14:08 omapl138-lcdk thttpd[277]:   fdwatch - 7 polls (1.06716e-06/sec)
Jul 26 08:14:08 omapl138-lcdk thttpd[277]:   timers - 3 allocated, 3 active, 0 free
Jul 26 08:15:40 omapl138-lcdk kernel: TCP: request_sock_TCP: Possible SYN flooding on port 9001. Sending cookies.  Check SNMP counters.
Jul 26 08:15:40 omapl138-lcdk systemd[1]: www-coda-init.service: Main process exited, code=exited, status=255/n/a
Jul 26 08:15:40 omapl138-lcdk systemd[1]: www-coda-init.service: Unit entered failed state.
Jul 26 08:15:41 omapl138-lcdk systemd[1]: www-coda-init.service: Failed with result 'exit-code'.
Jul 26 08:15:41 omapl138-lcdk systemd[1]: www-coda-init.service: Service hold-off time over, scheduling restart.
Jul 26 08:15:41 omapl138-lcdk systemd[1]: Stopped www-coda Run init Service.
Jul 26 08:15:41 omapl138-lcdk systemd[1]: Started www-coda Run init Service.
Jul 26 08:17:35 omapl138-lcdk systemd[1]: Started SSH Per-Connection Server (192.168.254.72:48006).
Jul 26 08:18:30 omapl138-lcdk systemd[1]: Started SSH Per-Connection Server (192.168.254.72:48008).
Jul 26 08:18:53 omapl138-lcdk systemd[1]: Started SSH Per-Connection Server (192.168.254.72:48010).
Jul 26 08:25:48 omapl138-lcdk systemd[1]: Started SSH Per-Connection Server (192.168.254.72:48012).
Jul 26 08:26:17 omapl138-lcdk systemd[1]: Started SSH Per-Connection Server (192.168.254.72:48014).

0 Mitesh Hiran over 7 years ago in reply to Mitesh Hiran

Mastermind 6235 points

ANd I think, its Linux v4.9.28
Thanks

0 Yordan Kovachev over 7 years ago in reply to Mitesh Hiran

TI__Guru**** 161600 points

Let me have a look at the attachments. I will update as soon as I have feedback.

0 Mitesh Hiran over 7 years ago in reply to Yordan Kovachev

Mastermind 6235 points

If I do this, will Linux even boot?

0 Yordan Kovachev over 7 years ago in reply to Mitesh Hiran

TI__Guru**** 161600 points

Sorry for the delay. I am working on this.

0 Mitesh Hiran over 7 years ago in reply to Yordan Kovachev

Mastermind 6235 points

Hi Yordan, thanks for looking into this. Also as a note, my custom OMAPL138 chip hardware has two Nand Flash CS2 and CS3 and are connected to WAIT0 and WAIT1 pin respectively. Hope to get some solution soon on this. Cheers.

0 Yordan Kovachev over 7 years ago in reply to Mitesh Hiran

TI__Guru**** 161600 points

I'll try to answer by EOB Monday.

0 Rex Chang over 7 years ago in reply to Yordan Kovachev

TI__Guru 50170 points

Hi, Mitesh,

I took a look at your dts files. They seems ok to me. The error shown in boot logs should have something to do with the other NAND not working. This may come back to the dts configuration. In TRM, address 0x60000000 is mapped to CS2 data area. I suspect it's the cs-chipselect but have not been able to find anything in the code to prove it. I am still investigating what could be the problem.

Rex

0 Mitesh Hiran over 7 years ago in reply to Rex Chang

Mastermind 6235 points

Hi Rex,

All I can see as a potential problem is the WAIT Pin used for CS2 NAND Flash. Looking at the nand.c driver file, I could not see how is it determining which wait pin to be used. But please do carry on with your investigation. Thanks.

0 Mitesh Hiran over 7 years ago in reply to Mitesh Hiran

Mastermind 6235 points

Hi Rex and Yordan, while you are investigating this problem, would you please also check what is the default ECC mode used whenusing nandwrite function on Linux. Thanks

In the device tree its is the following:

ti,davinci-ecc-mode = "hw";
ti,davinci-ecc-bits = <4>;

Is this using OMAP_ECC_HAM1_CODE_HW ??

Thanks.

0 Mitesh Hiran over 7 years ago in reply to Mitesh Hiran

Mastermind 6235 points

Hello, any update on this please.

0 Rex Chang over 7 years ago in reply to Mitesh Hiran

TI__Guru 50170 points

Hi, Mitesh,

Not much progress on the issue. As for the ECC question, no, OMAP_ECC_HAM1_CODE_HW is not used by davinci-nand. It is for other devices and for nand property of
ti,nand-ecc-opt = "ham1";

Rex

0 Mitesh Hiran over 7 years ago in reply to Rex Chang

Mastermind 6235 points

Hi Rex, what would you recommend to use for OMAPL138 SoC. I would like to use ECC. thanks.

0 Rex Chang over 7 years ago in reply to Mitesh Hiran

TI__Guru 50170 points

Hi, Mitesh,

ECC is supported. I happened to have a how-to video made recently on how to restore and update the u-boot in NAND. Though it is not targeted to the ECC, but there are 2 slides on the ECC layout. Hope you find it useful.

TI.com: training.ti.com/omap-li38-restore-nand
The YouTube version is here: https://youtu.be/NKSdRAL7cLk

Please open new thread if you have other issues. Thanks.

Rex

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Linux: How to add MTD Partition for additional NAND Flash in Linux Device Tree for OMAPL138 SoC