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AM3352: Dual MAC mode issues

Part Number: AM3352

Hello,

My customer is using TI AM3352BZCZA60.  There is one issues need your help for debug.

1.Problem description:

1.1Customer feedback AM3352 Ethernet interface will fail to access when running under Dual MAC mode.  Then customer process Up, Down and Ping test to eth0 and eth1, the issues can repeat. When issues happened, they shut down both eth0 and eth1 then turn up, the issues can be fixed.

1.2SDK version: ti-processor-sdk-linux-am335x-evm-08.00.00.00-Linux-x86-Install.bin

1.3 H/W background: Dual mac mode, port1(eth0) connect to PC,port2(eth1) connect to FPGA

2. What customer have done for debug:

2.1 We connected same Ethernet work to PC and AM3352 board to test, PC can get ARP pack, AM3352 can not. Which means AM3352 fail to access Ethernet. Chang phy config to loopback mode, can not fix this issues.

2.2 Upgrade the SDK kernel to latest one ' ti-processor-sdk-linux-am335x-evm-03.03.00.04-Linux-x86-Install',  retest the system, can not fix this issues

2.3 Remove genphy_suspend and genphy_resume function in phy_device.c, retest the system,  issues still exist

2.4 Use ifconifg eth0 promisc command, set ALE to bypass mode,  retest the system,  issues still exist

2.5 When issues happened, Shut down both eth0 and eth1, then turn up eth0, can successfully PING to AM3352 Ethernet interface, But if only shut down eth0  then turn up, can not fix this issues.

2.6 When issues happened, cpsw SL1 register MACCONTROL showed AM3352 interface is busy, reset cpsw SL1, can not fix this issues.  The related register is 0x4a100d88、0x4a100dc8.

Other questions:

1) When issues happen, what is the meaning of bit31 and IDLE status of MACSTATUS(0x4a100d88) register ? The right value should be 0x80000000. It will change to 0x0 when issues happened. What will cause this value change?

2) Sometime  when issues happened, executed ifconfig eth0 promisc   (ALE bypass). The issues can be fixed.  Customer want to  know what process will cause ALE fail?

Could you pls help set high priority to this issues? We expected a mail direct communication on this issues.

Since this issues is related one 100KU/Y project, will impact us and customer a lot.

  • Hi,

    Thank you for the problem description. I noticed that you installed to later SDK version but that is not the most recent. Please try the version 04.03 that is currnetly available on the TI website and see if that helps solve the issue.

    Can the FPGA connected to port be described in more detail? TI typically does not support on AM3/4/5/ devices where the Ethernet MAC is not connected to a PHY.

    Best Regards,
    Schuyler
  • Thank you for your reply。Ethernet MAC port connects to FPGA through the RMII interface and FPGA supplys the 50M REFCLK,FPGA acts as phy and sends data to another FPGA.

    Could you explain what the state of cpsw MACSTATE busy is and What can cause this result.

    Now,we have two problems,every probability appears in the communication process,one is cpsw MACSTATE busy and we config eth0 and eth1 down then up can fix it,the other we don't know why,but config down then up the problem ethernet can fix it .these problems also appear on DP83848.

    Whether there is some known bug of ethernet on this SDK version?

    we will try the kernel from the latest SDK version and Verify whether the problem can be fixed.

  • Hi Schuyler,
    Could you pls reply on customer’s questions? Free sky is customer engineer. Thanks
  • Hi,

    I was waiting to see the results of the test the customer was going to do on the latest TI SDK version.

    All the known bugs or issues are released with the kernel release notes for an SDK.

    Since there are two ports in use, is eth0 the port with a PHY on it having an issue if it is run by itself without bringing up eth1?

    Best Regards,
    Schuyler