Linux/DRA76P: DDR3 configuration for 4GB

Hi,

Anyone who can help me on this.
We are not using interleaving of memory.Is it required?
Will interleaving work if we are having EMIF1 with ECC?

Thanks

Hi,

There is a similar thread (link below) which discusses disabling interleaving for high-order memory, as well as the DMM LISA register settings.

e2e.ti.com/.../686907

One thing to note is that the LISA registers should only be used to configure the shared DDR memory space (0x8000_0000 - 0xFFFF_FFFF). The high order memory is fixed and accessible by only the MPU. 

The fixed high-order mapping can not access the lowest 1GB of each EMIF. Thus, the lowest 1 GB on each EMIF needs to be assigned in the DMM.

As an example, you could set the following for no interleaving:

static const struct dmm_lisa_map_regs lisa_map_dra7_4Gb = {
.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x80600100,   // (EMIF1: 1 GB non interleaved)
.dmm_lisa_map_2 = 0xC0600200,  // (EMIF2: 1 GB non interleaved)
.dmm_lisa_map_3 = 0xFF020100,
.is_ma_present = 0x1
};

The easiest integration with existing u-boot software would be to keep the high order memory interleaved. If this approach is taken, the only other modification you should need is to ensure that the lines of code below are included in the function "dram_init_banksize" inside "/board/ti/dra7xx/evm.c", which declares the extended memory sections. 

gd->bd->bi_dram[1].start = 0x200000000;
gd->bd->bi_dram[1].size = 0x80000000;

If this is not feasible due to ECC, then please let us know.

Best regards,
Kevin

Hi Kevin,

Thanks a lot for your reply.

I will check and let you know.

Regards,

Deep

Hi Somnath,

I tried with the following changes:

1)

void dram_init_banksize(void)

{

       u64 ram_size;

       ram_size = board_ti_get_emif_size();

       gd->bd->bi_dram[0].start = 0x200000000;           /*     Changed from CONFIG_SYS_SDRAM_BASE to 0x200000000* /;

       gd->bd->bi_dram[0].size = 0x80000000;                                                /*Changed from get_effective_memsize() to 0x80000000;*/

       if (ram_size > CONFIG_MAX_MEM_MAPPED) {

               gd->bd->bi_dram[1].start = 0x200000000;

               gd->bd->bi_dram[1].size = ram_size - CONFIG_MAX_MEM_MAPPED;

       }

2)

static const struct dmm_lisa_map_regs lisa_map_dra7_4GB = {
.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x80600100,
.dmm_lisa_map_2 = 0xC0600200,
.dmm_lisa_map_3 = 0xFF020100,
.is_ma_present = 0x1
};

From the uboot it is still reading  2GB and it is getting stuck after that:

Check the below logs:

reading u-boot.img

reading u-boot.img

reading u-boot.img

reading u-boot.img

U-Boot 2016.05-00009-gac1d50f-dirty (Aug 06 2018 - 16:13:24 +0530)

CPU  : DRA762-GP ES1.0

Model: TI DRA762 EVM

Board: DRA74x EVM REV

DRAM:  2 GiB

Thanks

Deep

Hi Deep,

Please leave  gd->bd->bi_dram[0].start and  gd->bd->bi_dram[0].size as the default.

You should only need to change the following (and ensure that they are being set...if needed please comment out the "if" statement):

gd->bd->bi_dram[1].start = 0x200000000;
gd->bd->bi_dram[1].size = 0x80000000;

Best regards,
Kevin

Hi Kevin,

You were right,it was not going inside the  

if (ram_size > CONFIG_MAX_MEM_MAPPED) 

I tried to print the ram_size before if statement. It was coming zero.

void dram_init_banksize(void)
{
u64 ram_size;
ram_size = board_ti_get_emif_size();
printf("**************Ramsize before if is %llu\n",ram_size);........................................Here it's coming zero

gd->bd->bi_dram[0].start =CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = get_effective_memsize();
if (ram_size > CONFIG_MAX_MEM_MAPPED) {
printf("**************Ramsize is %llu\n",ram_size); --------------------------------------------Not going inside if
gd->bd->bi_dram[1].start = 0x200000000;
gd->bd->bi_dram[1].size = 0x80000000;
}
}

Should I try commenting if ??

Regards

Deep

Hi Deep,

You could comment out the if statement or hard code ram_size to 4GB (shown below).

//ram_size = board_ti_get_emif_size();
ram_size = 0x100000000;

Let us know if this doesn't fix the issue.

Best regards,
Kevin

Hi Kevin,

Thanks for your reply.

This is showing 4GB in uboot as shown below:


U-Boot 2016.05-00009-gac1d50f-dirty (Aug 07 2018 - 19:38:04 +0530)

CPU : DRA762-GP ES1.0
Model: TI DRA762 EVM
Board: DRA74x EVM REV
DRAM: **************Ramsize before if is 4294967296
**************Ramsize is 4294967296
4 GiB

But Is the uboot actually getting 4GB?
Is there any tool to check the same in uboot?
Also what changes should be done in device tree file for kernel?

Thanks
Deep

Hi Kevin,

I checked the kernel logs by:

cat /proc/meminfo

root@dra7xx-evm:~# cat /proc/meminfo 
MemTotal:         533064 kB            ---------520MB
MemFree:          336828 kB
MemAvailable:     447376 kB
Buffers:            7724 kB
Cached:            96680 kB
SwapCached:            0 kB
Active:            43536 kB
Inactive:          73212 kB
Active(anon):      13708 kB
Inactive(anon):     3500 kB
Active(file):      29828 kB
Inactive(file):    69712 kB
Unevictable:           0 kB
Mlocked:               0 kB
HighTotal:        258048 kB
HighFree:         170128 kB
LowTotal:         275016 kB
LowFree:          166700 kB
SwapTotal:             0 kB
SwapFree:              0 kB
Dirty:              1832 kB
Writeback:             0 kB
AnonPages:         12344 kB
Mapped:            15204 kB
Shmem:              4860 kB
Slab:              29596 kB
SReclaimable:      18940 kB
SUnreclaim:        10656 kB
KernelStack:         968 kB
PageTables:          588 kB
NFS_Unstable:          0 kB
Bounce:                0 kB
WritebackTmp:          0 kB
CommitLimit:      266532 kB
Committed_AS:     171000 kB
VmallocTotal:     245760 kB
VmallocUsed:           0 kB
VmallocChunk:          0 kB
CmaTotal:         204800 kB
CmaFree:          161908 kB

I have compiled  using 

MAKECONFIG=tda2px_evm_linux_all   in Vision SDK  PROCESSOR_SDK_VISION_03_03_00_00

I think we need to change in the  mem_segment_definition_linux.xs the size of DDR3.

Do you have any suggestions on this?

Thanks

Deep

Hi,

Can anyone please reply on this?

Thanks

Deep

Thanks Somnath,

Will come back to you in case of any further query.
Regards,
Deep