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How can I view INT[15:4]?

Anonymous
Anonymous

Hi All,

 

I would like to ask a question on interrupt debugging.

 

How can I capture a CPU interrupt? For external events, because of the availability of Event Flag Register (EVTFLG), it is easy to halt the program and examine the bits of EVGFLG to see if an intended interrupt has indeed occurred.

 

But after these events has been processed through the interrupt controller, and eventually, one or some of INT[15:4] is generated, how to their values directly? Do INT[15:4] have addresses so they can be viewed in CCS4’s memory viewer, or they are CPU’s internal signal and hence not exposed to the programmer?

 

I would like to ascertain if they are exposed through memory addresses is because I have seen an answer by Brad Griffis, in which he said that interrupt task register (ITSR.GIE) “are part of the CPU so they do not have an address”, and in order to reference them one need to either “use the cregister keyword as described in the compiler guide” or “use a MVC instruction from assembly”.

 

What about INT[15:4]? Do they also lack memory address? How can their value be observed?

 

 

 

Sincerely,

Zheng

  • Zheng Zhao,

    Ideally, you would never be able to "capture a CPU interrupt". The ideal process is that an event occurs, it triggers the interrupt, the interrupt is serviced, and the program resumes with no remaining indication that an interrupt was active.

    But you may mean something different by "capture a CPU interrupt", in which case you will need to give us more information.

    It would be helpful to know which DSP you are using, and which version of CCSv4 you are using.

    I am not completely sure what you want to do, and not completely sure what you mean by INT[15:4]. The best source of documentation is the DSP Megamodule Reference Guide for your DSP. it has a section on the Interrupt Controller. But there is also more information on the interrupt "path" in the CPU and Instruction Set Reference Guide for your DSP.

    Assuming a C64x+ DSP, it may be helpful for you to review a Megamodule training video. In the Training section of TI.com, there is a training video set for the C6474 which has 3 C64x+ DSP cores. It may be helpful for you to review several of the modules. But in particular, the C64x+ Megamodule Features Module will apply to your current questions. You can find the complete video set at http://focus.ti.com/docs/training/catalog/events/event.jhtml?sku=OLT110002 .

     

    If this answers your question, please click the  Verify Answer  button below. If not, please reply back with more information.

  • Anonymous
    0 Anonymous in reply to RandyP

    Dear Randy,

    I am using 6437, and I would like to map VDINT0 to INT4 so that I can trigger a service routine.

     

    According to page 32, Table 10. DSP Interrupts - VPFE, the interrupt number associated with VDINT0 is 24. In the Interrupt Mux Register 1 (INTMUX1), I have set INTSEL4 bits to be 24 by the following code:

     

    associate VDINT0 with INT4 in INTMUX1 said:

    #define INTMUX1     *( volatile Uint32* )( 0x01800104 )

    main()

    {

    ...

    INTMUX1=24;

    ...

    }

       

    By observing Event Flag Register, I could see that VDINT0 (and VDINT1) are always latched to 1, which is precisely wha has been said on page 89 of SPRU977a (VPFE document). I have associated INT4 with function my_isr() in vectors.asm, but the program never runs into the breakpoint which I put inside my_isr().

       

    I did not use DSP/BIOS, but instead modified an example from Brad Griffis's example. My vectors.asm and linker.cmd  are:

     

    Vectors.asm said:

        .ref    _c_int00
     .ref _my_isr       
     
     .sect "vectors"

     ; tell assembler not to use 16-bit compact instructions
     ; or else the vectors will not reside properly in memory
     ; (applies to entire section in which it is contained)
     .nocmp

    RESET_RST:  
         mvkl .S2 _c_int00, B0
         mvkh .S2 _c_int00, B0
         B    .S2 B0
      NOP
      NOP
      NOP
      NOP
         NOP
    NMI_RST:   
         NOP
      NOP
      NOP
      NOP
      NOP
      NOP
      NOP
      NOP

    RESV1:
         NOP
      NOP
      NOP
      NOP
      NOP
      NOP
      NOP
      NOP

    RESV2:
         NOP
      NOP
      NOP
      NOP
      NOP
      NOP
      NOP
      NOP

    INT4:
      b _my_isr
      NOP
      NOP
      NOP
      NOP
      NOP
      NOP
      NOP

          

          

    linker.cmd said:

    -l rts64plus.lib
    -l .\lib\SEED_DEC6437Bsl.lib

    -stack          0x00000800      /* Stack Size */
    -heap           0x00000800      /* Heap Size */

    MEMORY
    {
        L2RAM:      o = 0x10810000  l = 0x00020000
        DDR2:       o = 0x80000000  l = 0x1000000
    }

    SECTIONS
    {
        vectors  >  0x80000000, RUN_START(_ISTP_START)
        .bss        >   DDR2
        .cinit      >   DDR2
        .cio        >   DDR2
        .const      >   DDR2
        .data       >   DDR2
        .far        >   DDR2
        .stack      >   DDR2
        .switch     >   DDR2
        .sysmem     >   DDR2
        .text       >   DDR2
      /* .ddr2       >   DDR2*/
    }

                     

                

    and I have added my_isr() in main.c:

    my_isr() said:

    #define INTMUX1     *( volatile Uint32* )( 0x01800104 )

    void main( void )
     {

       
        /* Initialize BSL */
        EVMDM6437_init( );

     video_vga_test();
     
     INTMUX1 = 24;
     
     
     
     for(;;);
    }

    interrupt void my_isr()
    {
     asm(" NOP");
     asm(" NOP");
     asm(" NOP");
    }

        

    The problem is that the program never runs into the breakpoint my_isr(). Since I was able to see VDINT0 (and VDINT1) in Event Flag Register (EVTFLG), there could only be two causes for this problem:

    1. VDINT0 (interrupt number 24) has not been associated with INT4 by my INTMUX1 modification.
    2. There are error in either vectors.asm or linker.cmd, or both.

     

    Is there any error in my configuration? Could you help me to identify the problem?

     

    Sincerely,

    Zheng

  • You never configured ISTP to point to your interrupt vector table...

  • In addition to the documents and training materials listed in my previous post, you will benefit greatly from the training materials at TMS320C64x+ DSP System Integration Workshop using DSP/BIOS.

    These training materials offer an excellent view of the processor architecture and programming requirements and techniques. These are much better than anything you can get from me writing my opinion of what you are asking or my interpretation of the documentation to you. This training is practical in orientation and includes labs and solutions.

  • Anonymous
    0 Anonymous in reply to Brad Griffis

    I could not imagine a more awesome answer.

    Truly sorry for my ignorance.

     

    Zheng

  • Anonymous
    0 Anonymous in reply to RandyP

    Dear Randy,

     

    It takes me a US consulate's visa approval before I could come.

     

    Zheng

  • I think Randy's intent was to simply read the workbook and try the labs from the workshop.  Too bad you can't come -- I'm teaching one next week in the Chicago area!

  • Anonymous
    0 Anonymous in reply to Brad Griffis

    Dear Brad and Randy,

    I am simply feeling "sorry" for myself. If I were in the United States, I believe the progress will be much faster.

    Thank you both for your invaluable help.

     

    Zheng

     

  • Where are you?

  • Anonymous
    0 Anonymous in reply to RandyP

    Dear Randy,

     

    From China.

     

    Zheng

  • Awesome. You are working very late.

    Are you with a company or consulting firm working on a specific product? Or are you learning the processor and programming for possible future development?

    I never name my customers on the open forum, and you may prefer to keep that protected, but general information is always of interest. There is no restriction on you using specific names, just a personal or corporate policy may apply.

    Welcome to E2E.

    Regards,
    RandyP

  • Anonymous
    0 Anonymous in reply to Brad Griffis

    Dear Brad,

     

    I am interested in DSP/BIOS, but just was not able to configure it to work. Is there a step-by-step tutorial for setting up interrupt in CCS4 for a stupid Microsoft Windows user (I have seen Setting up interrupts in DSP BIOS, but it doesn't seem to be in CCS 4)?

     

    Zheng

  • Please see the training materials at TMS320C64x+ DSP System Integration Workshop using DSP/BIOS.

    That is what these are intended for, teaching you to use CCSv4 and the DSP with BIOS.

  • Anonymous
    0 Anonymous in reply to RandyP

    Dear Randy,

     

    I will study them. Thanks very much.

     

    Zheng