AM5716: Modifying DSP L1 cache configuration from ARM

Butters

Expert 2021 points

Part Number: AM5716

Hello,

I would just like to confirm whether or not the following statement is true:

"There is no way to modify the L1 cache configuration of the DSP core from code running on the ARM core."

I'm asking because I have a bootloader, running on the ARM core, that is attempting to load initialized data sections directly to DSP L1D. This isn't working because DSP L1 memory is configured as cache by default.

Thanks as always,
Dave

over 7 years ago

0 Biser Gatchev-XID over 7 years ago

TI__Guru**** 393215 points

The RTOS team have been notified. They will respond here.

0 lding over 7 years ago in reply to Biser Gatchev-XID

TI__Guru* 95265 points

Hi,

The L1DCFG is inside the DSP corepac, no other system master has access to it. You can read and write from local DSP core only, I don't think you have a way to change the L1D cache (default to 32K all cache) to data from ARM.

Regards, Eric

0 Butters over 7 years ago in reply to lding

Expert 2021 points

Eric, thank you for the prompt and clear answer!

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AM5716: Modifying DSP L1 cache configuration from ARM