64x+ CPU Registers

Zheng Zhao said:

Why this register (ITSR.GIE) are not exposed to the programmer by a valid address?

First, why are you trying to access ITSR (and not TSR)?

As you can imagine, there is more than one way to construct a processor.  This device makes its registers available from assembly using the MVC instruction and from C using the cregister keyword.  What's the issue?

For more info on the cregister keyword please see the Compiler User Guide.

Zheng Zhao said:

 

1. I have consulted some C2000 developers and they said on C2000 GIE (global interrupt enable) has an address and can be set. Is "Those registers are part of the CPU so they do not have an address" peculiar to C6000?

I wouldn't call it peculiar, but yes, that's how it's implemented on this device which happens to be different from c2000.

Zheng Zhao said:

Are they enabled by default?

Please see the register definition in the CPU and Instruction Set Guide.  Its default values are given there.

Zheng,

FYI, I've split this thread and given it a new title.  In the future please do not reply to threads that already have a verified answer.  If you wish to reference another thread you can post a link to it, but please do so inside a new thread.  Generally speaking once a thread has been marked as "verified" the TI engineers know the issue is resolved and we don't have to waste valuable time reading through the thread.  So if you reply to an old thread nobody will ever look at it!

Thanks,

Brad

Dear Brad,

OK, I got it.

Zheng