Part Number: AM5726
Tool/software: Linux
When the AM5726 system is reset by a low level input to the CPU's RESETn or PORZ PIN, the RSTOUTn of CPU will output a low level reset PMU, and PMU's RESET_OUT signal also outputs a low level. Through the following AND GATE circuit, the U19 will continue to reset the CPU, and The process of reset continues. (the whole control logic is consistent with the IDK DEMO).
Why？how to solve it ？if you give some help , I appreciate it..
