C5505 peripherals with gated clocks

john5123

Hi,

Does TI have any documentation on the behaviour of I/O pins associated with peripherals that have had their clocks gated? In particular, is there a defined state for pins connected to SPI, I2S and EMIF peripherals when their clocks are gated to save power?

Thanks,

John

over 14 years ago

0 Mugdha Gadkari over 14 years ago

TI__Intellectual 1035 points

Hello John,

The peripheral's I/O state is preserved when the peripheral's clocks stop.

The C5000 System User's guide has additional information about it. You can refer to section 1.5.3.2 here: http://focus.ti.com/lit/ug/sprufx5/sprufx5.pdf

Regards,

Mugdha Gadkari

0 john5123 over 14 years ago in reply to Mugdha Gadkari

Intellectual 555 points

Thanks Mugdha.

Regards,

John

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C5505 peripherals with gated clocks