CCS/66AK2H12: Memory optimization on K2H / How to use platform & cfg appropriately (?)

Bruce McKinley

Part Number: 66AK2H12

Tool/software: Code Composer Studio

We are using BIOS 6.46.05.55 and IPC 3.46.2.04 on the K2H. We have IPC configured according to an example, using the platform evmTCI6636K2H:core0 etc. However, this platform places all DSP sections in external DDR memory. Two main questions:

1) What is the most efficient way to use the C66x memory on the K2H?

Our program is 172K with no optimization, but only 12K of computational DSP code.
We have several large data structures which we assigned to a named section that will need to stay in DDR3, but we might like to assign smaller buffers (32K or so) to L2SRAM.

What is the best way to use the memories on the K2H?

2) How do you use specify in the cfg file how you want to allocate the DSP memories between cache, program, data or stack allocation?

Thanks,

Bruce

over 8 years ago

0 Yordan Kovachev over 8 years ago

TI__Guru**** 161600 points

Hi,

I've notified the RTOS team. They will post their feedback directly here.

Best Regards,
Yordan

0 lding over 8 years ago in reply to Yordan Kovachev

TI__Guru* 95265 points

Hi,

For Q1. The DSP has L2 which can be used for your 172KB program. It is faster memory. You can also make some of L2 as cache. For your big data, you have to put there in the shared memory like MSMC or DDR as size limitation. Yes, you can put some data buffer inside L2, too.

For Q2: processors.wiki.ti.com/.../Processor_SDK_RTOS:_TI_RTOS_Tips_And_Tricks

Regards, Eric

0 Bruce McKinley over 8 years ago in reply to lding

Intellectual 760 points

Thanks for your reply. But what about L1DSRAM? I was able to use it for stack/data when I created my own platform file. Since we are using IPC we are stuck with a config.bld file that specifies memories across the device, and a platform that is the evmTCI6636KH2 platform.

Also, what about 2)? We can't specifically go into the platform file and change how memories are allocated so how do I accomplish this using the .cfg and the .bld files? I am attaching our config.bld file in the hope you can point out how I can use L1DSRAM for data and how I can better utilize L2SRAM for stack and data buffers.

Thanks,
Bruce

config_gdu.zip

0 Sahin Okur over 8 years ago in reply to Bruce McKinley

TI__Mastermind 27355 points

Hello Bruce,

To use L1 and L2, add the following lines to your config.bld to configure it as all RAM instead of cache:

l1DMode: "0k",
l1PMode: "0k",
l2Mode: "0k"

So your config.bld would look like this:

Build.platformTable["ti.platforms.evmTCI6636K2H:core0"] = {
    externalMemoryMap: [
        [ "CORE0_PROG", {
            name: "CORE0_PROG", space: "code/data", access: "RWX",
            base: 0x80000000, len: 0x2000000,
            comment: "CORE0 Program Memory (32 MB)"
        }],
        [ "SR0", SR0 ],
        [ "SHARED_BUFS", SHARED_BUFS ],
        [ "SR1", SR1 ]
    ],
    codeMemory: "CORE0_PROG",
    dataMemory: "CORE0_PROG",
    stackMemory: "L2SRAM",
    l1DMode: "0k",
    l1PMode: "0k",
    l2Mode: "0k"
};

Then in your .cfg file you can add something like the following to place sections into RAM:

Program.sectMap[".stack"] = new Program.SectionSpec();
Program.sectMap[".stack"].loadSegment = "L2SRAM"; //or "L1DSRAM"

Also, you still have the option of using your own platform, just make sure to change the platform in your CCS settings and in the config.bld to match:

Build.platformTable["ti.platforms.evmTCI6636K2H:core0"] = {

The config.bld just offers the ability to change the memory map at the application level.

I hope this helps. If you have any questions please let us know.

0 Bruce McKinley over 8 years ago in reply to Sahin Okur

Intellectual 760 points

Excellent information! This solved my fundamental question. Now I am able to freely assign sections to the L1 & L2 memories. Thank you!

I'm still not quite sure about your advice of creating my own platform. I had attempted to do what you state, but something in the evmTCI6636K2H platform creates the host, core0, etc stuff and I could not make my platform generate those things. That's OK, though, because now I can just use the evmTCI6636K2H one and configure memory as you show.

Thanks,
Bruce

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CCS/66AK2H12: Memory optimization on K2H / How to use platform & cfg appropriately (?)