CKLOUT (Pin T18)

Inderjit Bains

What are the output characteristics of pin T18 when it's used as CLKOUT? Table 3-6 refers to it as "PLL Observation Clock". Can it be used to drive the clock input of another chip (2pF input capacitance, + trace capacitance)?

over 15 years ago

0 tehoaislimau over 15 years ago

Intellectual 360 points

Interesting idea.

I would like to know which PLL's can be routed to this pin, and if individual PLLs routed to this pin can further be divided down?

Did you find any document or register description in regards to this pin function? can you let me know

0 Mukul Bhatnagar over 15 years ago

TI__Guru* 85255 points

Inderjit

The CLKOUT when initially spec'd was made available more from a debugging aid standpoint. It should be fine to be able to use the CLKOUT as a clock source. While the IO buffer on this pin is similar to EMA_CLK (runs upto 100+ MHz) , it is likely that the signal quality of the signal will start to degrade significantly at higher clock speed. So it would be best to do an IBIS analysis to see what is the max speed you can get for the load conditions you specified.

Regards

Mukul

0 Mukul Bhatnagar over 15 years ago in reply to Mukul Bhatnagar

TI__Guru* 85255 points

Hi Faisal

The details on CLKOUT configurability are provided in the system guide, PLL chapter.

You can look at Figure 8-1 and description on PLL registers (OSCSEL and CKEN etc). CLKOUT pin can route either PLLC0 or PLLC1 output depending on how the PLLC0 OBSLCK Select Register is setup.

Regards

Mukul

0 Inderjit Bains over 15 years ago in reply to Mukul Bhatnagar

Expert 2745 points

The required output frequency is 24 - 48 MHz. I did a basic simulation, and it look okay with various output drivers. What is the closest approximation to a standard output (eg. LVC)?

0 Inderjit Bains over 15 years ago in reply to Inderjit Bains

Expert 2745 points

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CKLOUT (Pin T18)