DM6446 Video Backend Sync

Our output video port can act as a master (provides syncs) or a slave (receives syncs); however, this option is only available when operating in non-standard digital output more (e.g. 720x480 @ 30 fps).  When operating on BT.656 mode (analog or digital), the sync information is embedded in the data-stream and the device providing the video data also provides the syncs.

We have a unique situation for our application where we need our output signal to be synchronized to our input signal and the only way to do so is to synchronize the DaVinci output to the input syncs.  The input is an RS-170 video stream with embedded syncs and we need our output to be synchronized to those same syncs.  Can we generate a non-standard data stream that is compatible with RS-170?

I am not all that familiar with RS-170, but our video ports are pretty flexible so this may be possible.  I will outline some thoughts below which may be helpful

1) You mention the input will be an RS-170 stream with embedded syncs; please note that DM6446 only accepts digital (no analog) video inputs and BT.656 is the only format supported with embedded syncs.  Therefore, unless RS-170 is backward compatible to BT.656 (it would appear this is possible), then you may need additional conversion before feeding this stream to DM6446.

2) If you are using BT.656 video input interface to input your video stream, then you may have to trigger of the internally generated VSYNC interrupt and use GPIO lines to provide HYNC, VSYNC signals to VPBE (e.g. sync VPBE to VPFE).  If you are converting RS-170 to something other than BT.656 before feeding data into DM6446 (no embedded syncs), then you can simply use HSYNC/VSYNC signals at VPFE to drive signals at VPBE as well.

3) Both VPFE and VPFE are very flexible and will allow you to program your RS-170 frame size and timings accordingly when not using embedded sync approach; if you must use the embedded sync approach (for both front end and back end), then I am afraid the this is only possible RS-170 is compatible with BT.656 and I do not know enough about RS-170 to say if this is so.

We are converting the RS-170 analog video to digital using a TVP5146 D/A converter chip much like on the DEVEVM board by Spectrum Digital.

I believe that RS-170 is an NTSC equivalent, the predecesor standard to NTSC. From some past interactions regarding this I was under the impression that it was black and white NTSC, though I have also read of color RS-170, either way if it is coming from the TVP5146 it will be going into the DM6446 as a bt.656 stream and look just like NTSC.

I suppose what you have to do in this case will depend on how accurate you need to be with the synchronization, doing this properly will probably require external hardware so if you have already created your board you may need to make a modification.

I would need to know a bit more about your display to determine the exact way to do this, assuming you are usijng digital output on the VPBE and your display device can handle being a slave on the sync lines than you could theoretically take the sync lines from the TVP5146 (though the bt.656 will be using embedded syncs the hardware syncs should still be usable from the TVP though I have not tried this) and run them to the VPBE side such that both the VPBE and the display are slaves to the TVP5146 syncs. Note that when doing this or any synchronization method that does not bypass the DM6446 entirely that there will still be a frame delay in effect, that is the VPBE will not have the same frame at the same time as the VPFE, there has to be a delay of time inside the DM6446 to handle the frame and pass it from the VPFE driver to the VPBE driver, all this does is make that delay a multiple of your frame period.

If you are using the analog output of the DM6446 this will probably be more difficult, as the analog output uses an internal video encoder that generates all its timing information within (that is, it expects to always be the master and only supports pre canned timings), and it does not output this timing information digitally (no syncs). This being said, in the case of the analog output you would likely have to just try to time the starting of the VPBE such that it aligns with the VPFE signal which would be a software only modification but would not necessarily be accurate, or reliable.

So I have been doing some digging on this synchronization issue, and it may still be possible to do this from the analog stand point. Initially I was under the impression that the video encoder inside the VPBE would not be able to accept external timing based on the fact that it is disabled when the VMD bit in VMOD is set to non standard timing mode, however it looks like this may not be the case. What is even better, is that there does appear to be a connection between the VPFE and VPBE for synchronization with the EXSYNC bit in SYNCCTL, though I am not sure if it applies to a bt.656 capture by the VPFE so this would have to be tested.

This being said you may want to try setting VMOD->SLAVE (offset 0x2400 bit 5) to 1 and SYNCCTL->EXSYNC (offset 0x240C bit 10) to 1 and see what happens. If it works you should find that the VPFE and VPBE signals are now directly related to each other if not in sync already, if they are not entirely in sync you may have to do some external tweaking, as when you set the VPBE to be slave you can no longer define the timing parameters, particularly when using the DACs since that locks you into the pre defined NTSC/PAL timings.

This is still sort of an experiment, as I have never come across the need to have the input and the output in sync so I have not seen these bits used myself, but it is certainly worth a shot as if it works it means that no hardware modifications would be necessary.

I will give it a try and post the results.

When I set the EXSYNC bit to 1 (CCD sync signal), what clock does this try to synchronize to?  I'm getting no output on my video display and I'm just wondering if it is because there is a missing clock somewhere.

The clock itself is likely to be the same internal clock you would have used with internal timing generation, these bits only refer to the sync signals. No output on the video display could mean that either the EXSYNC setting only applies to external syncs on the VPFE/CCDC or that EXSYNC will not apply to analog timings. The latter may be true based on table 69 on page 121 of SPRUE37c showing nothing in the analog columns for the SYNCCTL register's bits which implies they are not used.

I am still currently of the belief that this should be possible given the statement in section 4.4.2 that master and slave mode can apply to the two video timing modes defined by the VMD bit, which implies that the analog output from the video encoder can be based on slave synchronization signals. The next step to try would be to just enable the SLAVE bit and set VIDCTL->SYDIR to 1 to enable the sync pins as inputs and run a small wiring job to the sync pins thus bypassing the EXSYNC setting, of course this assumes that the sync lines are exposed somewhere you can easily get to them. However since SYDIR is not shown to be a pin used by the analog output modes in table 69 as mentioned above I question if this would work either, which makes me begin to think my original assesment that the analog outputs could not be synchronized may be true.

At this point I am questioning the validity of portions of the SPRUE37c manual, it seems ambiguous as to if you can use the analog outputs in a slave sync mode or not, this said I will have to do some further digging to try to clarify this.

By "small wiring job", are you referring to wiring the HD and VD pins to HSYNC and VSYNC pins?

Yes, this would be connecting the horizontal and vertical syncs from the VPFE/TVP5146 to the VPBE.

This does work.  Apparently some of the digital portion of the VPBE is connected to the analog VPBE.  We looked at the results on the scope and the output is synchronized.

This is wonderful news, so you just had to run the sync signals with a wiring patch job from the TVP5146 to the VPBE and the video output started to function with the SLAVE bit enabled? In which case it seems that the slave synchronization is possible and it is just the internal sync connection to the CCDC does not work for this particular setup. Hopefully this puts it in sync enough for your particular applications needs :). Please post if it looks like there are more issues.

HI:

If  vpfe of DM6446 input  data is BT656 (Yuv422), do I need to pay attention to the parity field settings?If  need, how I need  to set?

Thank you.