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Appendix B in the application note SPRAB41C

Other Parts Discussed in Thread: AM1806

We have a few queries with reference to Appendix B in the application note SPRAB41C on the TI website which provides the details of the supported NAND devices.

 

1.       If the device is not ONFI compliant and if the NAND device ID is not in the list (of supported devices), will the AM1806 boot out of such a device if the 4th byte of the ID register is 0x95 or 0x15? We are looking at using 256MB and 512MB devices.

2.       Does the boot-loader on AM1806 support a 16 bit NAND boot?

  • As the appendix states, if the size of the NAND is greater than 128 MB, it will check the 4th byte of the ID register. A value of 0x15 or 0x95 would tell the bootloader that the device has the following properties:

    Data bus width: 8-bit
    Block size: 128KB
    Page size: 2KB

    The boot loader also supports 16 bit NAND boot in the later ROM revisions (PG1.1 and higher). This is done using the bootpins as shown in Appendix A.

    Jeff

  • Just to clarify, it seems the RBL will certainly attempt to boot out of NAND devices that are larger than 128MB, and that are not listed in table 9. It will treat these kinds of NAND based on table 10 when it attempts to boot, so assuming your NAND device matches what the RBL expects (table 10) based on the 4th byte in the ID register, it should boot.

    In other words if your NAND with the ID value of 0x15 or 0x95 happens to have an 8 bit wide bus with 128KB block size and a 2KB page size, you should be good to go.