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Two display ports??...HELP!

Ben9619
Intellectual 330 points
Other Parts Discussed in Thread: CCSTUDIO

I'm trying to debug a program to run a capture port and two display ports on the dm642 and have run into a problem. The original code ran capture on VP0 and display on VP1. Now I am trying to add display to VP2. I can get each display port to work independently but if I combine the code to run both displays VP! and VP2 simultaneously the program gets lost and crashes on the FVID_exchange call to the second video port. It seems to be a problem with the handle creation not the frame buffer because I can look in memory and see where the frame buffer is and that it has valid image data in it.

I tried changing the order in which I create the handles for the cap, dis1 and dis2 ports and it's always the last one that fails. Is this a problem with my EDMA config?? Something else?

Thanks in advance

  • TI__Mastermind 41665 points

    I haven't worked with a dual display on the DM642 though I have seen a dual capture single display (the picture in picture example), and I do believe that the driver can handle having two display instances. My first thought would be to make sure that you have adequate heap space available (configurable in your BIOS config file), as if the heap is too small the malloc calls within the allocation process could fail giving you a null handle.

  • in reply to Bernie Thompson TI
    TI__Guru*** 125430 points

    Adding on to Bernie's comment, if you go in CCS to the DSP/BIOS menu you can open the Kernel Object Viewer (KOV).  It will show you how much of the system stack and task stacks have been consumed and lots of other good info.  Make sure things look ok here.

  • in reply to Brad Griffis
    Intellectual 330 points

    I looked into the KOV to check the stack and heap usage...the stacks all show plenty of head room, the heap is a different story. The KOV shows that all but 32 bytes of my heap are used however this amount doesn't change whether I increase or decrease the amount allocated to the heap. I can cut the heap size from 16MB to 8MB and the program still runs a single display no problem and shows that I have 32 bytes left.

    Bernie, do you have any example code from a PIP dual capture system, maybe that would offer me a clue.

    Thanks for your help

  • in reply to Ben9619
    TI__Mastermind 41665 points

    You should be able to find the picture in picture example within C:\CCStudio_v3.1\boards\evmdm642v3\examples\video\driver or a similar path to your DM642 software, there should be a ntsc.pjt (or pal.pjt) that has a build setting to make a PIP example, a normal loopback, or a colorbar display. In particular there is a C:\CCStudio_v3.1\boards\evmdm642v3\examples\video\driver\tests\video_sd.c that contains the application code, note that this has all three versions in it just seperated by #define statements depending on what the example is set to do.

    It is odd that the heap is not showing up properly in the KOV, perhaps something else is getting corrupted in the system, or this could just be a bug, what version of CCS and BIOS are you using?

  • in reply to Bernie Thompson TI
    Intellectual 330 points

    CCS v3.3.38.2 and BIOS 5.31.02... I tried checking the status returned by the FVID_create calls and found that the capture handle is 80000000h, display1 is 800000B0h but display2 is 8020D180. The buffers for cap, dis1, and dis2 end up at 80000100h, 801C2180h, and 802A3280 respectively. My heap is from 80000000 to 81000000.

    I'll try to find the PIP example tomorrow morning...

  • in reply to Ben9619
    Intellectual 330 points

    It seems you are correct that the problem has to do with memory...I created a stripped down test code that runs an unprocessed image from the capture to two displays and it works. So I guess I will have to go through and find out if it's allocation or I've run out of memory (hopefully it's option A).

    My next question stemming from this is where should the frame buffers for the 3 video ports be located. I have 3 frame buffers being allocated for each port in my heap but I see in the datasheet that it lists a memory space for VP0, VP1, and VP2 data in the 0x7400 0000 range. Should I be allocating my buffers in there or is that the space where a frame goes to be displayed? In other words is this the place where the currently displayed frame lives after an FVID_exchange call grabs one of the 3 frame buffers I have in the heap or should my 3 frame buffers be in the 0x7400 0000 range to begin with?

    Thanks again for your help.

  • in reply to Ben9619
    TI__Mastermind 41665 points

    Ben said:
    Should I be allocating my buffers in there or is that the space where a frame goes to be displayed? In other words is this the place where the currently displayed frame lives after an FVID_exchange call grabs one of the 3 frame buffers I have in the heap or should my 3 frame buffers be in the 0x7400 0000 range to begin with?

    Your buffers should all be allocated in SDRAM (i.e. 0x80000000 something), the addresses you are looking at are FIFOs that the video driver will read and write to get your image into SDRAM in the capture case and out of SDRAM in the display case. Essentially these are not real memory so allocating to them is not really possible, though you are correct these addresses are where the video data comes and goes, an entire frame never exists there at once just portions that fit within the video port FIFOs.