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66AK2H14: power-up sequence

Part Number: 66AK2H14

Hi,

I have a question about the power-up sequence described in fig 11-1 of the datasheet (SPRS866G)..

We can see here (and this is also explained at note 6 of table 11-2) that the POR signal must wait for VDDUSB, VP,VPTX, and VDD33 before being set to '1'.

But in applications where USB is totally unused, I understood from the harware design guide document SPRABV0 (§2.3.5)  that theese supplies could be tied to GND, meaning that they will never ramp-up.

Therefore ,in that case what becomes the timing condtion applying to the .POR input ?

with best regards,

Bruno

  • Hi Bruno,

    Table 11-2 and Figure 11-1 describe the core before IO sequence. And Note 6 states:
    " • POR must continue to remain low for at least 100 μs after all power rails have stabilized.
    End power stabilization phase"

    So in the case when USB is totally unused you must hold POR low for 100 μs after all other (used) power rails have stabilized and then release it. This means follow the power-up sequence shown on Figure 11-1, hold POR low 100 us after the last power rail (DVDD33) is ramped up.

    Best Regards,
    Yordan
  • You mean : ......."hold POR low 100 us" after VDDALV is ramped up, not VDD33 which will never ramp-up (neither VDDUSB,nor VP,VPTX all of them being dedicated to USB) I presume.

  • Bruno,

    You are correct.  The USB signals that are either left floating or grounded are removed from the power sequence diagram.  These power supply inputs are DVDD33, VDDUSB, VP, VPH and VPTX.  The remainder of the power sequence requirements continue with these removed when USB is not used.

    Tom

  • Thank you Tom,

    This is perfectly clear.

    Regards

    Bruno