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Linux/AM4376: QSPI flash error

Part Number: AM4376

Tool/software: Linux

Hello All,
We have custom board based on am4376 with on board QSPI-NOR flash mx66L1g45(128MiB).

We make device entry for mx66L1g45 in drivers/mtd/spi-nor/spi-nor.c and in drivers/mtd/devices/m25p80.c
We are using linux kernel 4.4.41 provided by TI.
During boot time mx66L1g45 successfully detected but after that we get core dump(please refer dmesg.txt).


Please guide me to solve this issue.

Regards,

Dhananjay Patil

Attachments:=

/*
 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/* AM437x GP EVM */

/dts-v1/;

#include "am4372.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "TI AM437x GP EVM";
	compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";

	aliases {
		serial5 = &uart5;
	};

	evm_v3_3d: fixedregulator-v3_3d {
		compatible = "regulator-fixed";
		regulator-name = "evm_v3_3d";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		enable-active-high;
	};

	vtt_fixed: fixedregulator-vtt {
		compatible = "regulator-fixed";
		regulator-name = "vtt_fixed";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
		gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
	};

	vmmcwl_fixed: fixedregulator-mmcwl {
		compatible = "regulator-fixed";
		regulator-name = "vmmcwl_fixed";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&led_pins_default>;

		led@17 {
			label = "RUN_LED";
			gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;	
			default-state = "off";
		};
		led@18 {
			label = "POWER_LED";
			gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; 
			default-state = "off";
		};
		
		led@19 {
			label = "ERROR_LED";
			gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;	
			default-state = "off";
		};
		
		led@21 {
			label = "LTETX_LED";
			gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;	
			default-state = "off";
		};
		
		led@20 {
			label = "LTERX_LED";
			gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};


	   };

	/* fixed 12MHz oscillator */
	refclk: oscillator {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <12000000>;
	};

	/* fixed 32k external oscillator /clock */
	clk_32k_rtc: clk_32k_rtc {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <32768>;
	};
};

&am43xx_pinmux {
	pinctrl-names = "default", "sleep";
	//pinctrl-0 = < &ddr3_vtt_toggle_default &unused_pins &debugss_pins>;

	ddr3_vtt_toggle_default: ddr_vtt_toggle_default {
		pinctrl-single,pins = <
			0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* spi0_cs0.gpio5_7 */
		>;
	};

	i2c0_pins: i2c0_pins {
		pinctrl-single,pins = <
			0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
			0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
		>;
	};

	i2c1_pins_default: i2c1_pins_default {
		pinctrl-single,pins = <
			0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
			0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
		>;
	};

	i2c1_pins_sleep: i2c1_pins_sleep {
		pinctrl-single,pins = <
			0x15c (PIN_INPUT_PULLUP | MUX_MODE7)
			0x158 (PIN_INPUT_PULLUP | MUX_MODE7)
		>;
	};

	i2c2_pins: i2c2_pins {
		pinctrl-single,pins = <
			0x17c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3)  /* (L22) uart1_rtsn.I2C2_SCL */
			0x178 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3)  /* (K22) uart1_rtsn.I2C2_SDA */
		>;
	};

qspi_pins: qspi_pins {
		pinctrl-single,pins = <
			0x088 ( PIN_OUTPUT | MUX_MODE2 ) /*B12 qspi_clk*/
			0x07c ( PIN_OUTPUT | MUX_MODE3 ) /*A8 qspi_csn*/
			0x090 ( PIN_INPUT | MUX_MODE3 ) /*A9 qspi_d0*/
			0x094 ( PIN_INPUT | MUX_MODE3 ) /*E10 qspi_d1*/
	 		0x098 ( PIN_INPUT_PULLUP | MUX_MODE3 ) /*D10 qspi_d2*/
 			0x09c ( PIN_INPUT | MUX_MODE3 ) /*C10 qspi_d3*/
		>;
	};

gps_spi_2_pins_default: gps_spi_2_pins_default {
		pinctrl-single,pins = <
		  0x260 ( PIN_OUTPUT | MUX_MODE0)
		  0x264 ( PIN_OUTPUT | MUX_MODE0)
		  0x268 ( PIN_OUTPUT | MUX_MODE0)
		  0x26c ( PIN_OUTPUT | MUX_MODE0)
		>;
	}; 


	subghz_spi_4_pins_default: subghz_spi_4_pins_default {
		pinctrl-single,pins = <
		 0x250 ( PIN_OUTPUT | MUX_MODE0)
		 0x254 ( PIN_OUTPUT | MUX_MODE0)
		 0x258 ( PIN_OUTPUT | MUX_MODE0)
		 0x25c ( PIN_OUTPUT | MUX_MODE0)
		>;
	};

	
	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
			0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
			0x0f0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
			0x0f4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
			0x0f8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
			0x0fc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
			0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
		>;
	};

	mmc1_sleep_pins: pinmux_mmc1_sleep_pins {
		pinctrl-single,pins = <
			0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x104 (PIN_INPUT | PULL_DISABLE | MUX_MODE7)
			0x0f0 (PIN_INPUT | PULL_DISABLE | MUX_MODE7)
			0x0f4 (PIN_INPUT | PULL_DISABLE | MUX_MODE7)
			0x0f8 (PIN_INPUT | PULL_DISABLE | MUX_MODE7)
			0x0fc (PIN_INPUT | PULL_DISABLE | MUX_MODE7)
			0x160 (PIN_INPUT | PULL_DISABLE | MUX_MODE7)
		>;
	};

	cpsw_default: cpsw_default {   
	pinctrl-single,pins = <

      /* Slave 1*/
        0x114 ( PIN_OUTPUT_PULLDOWN| MUX_MODE0)   /* (A13) mii1_tx_en.gmii1_txen */
        0x118 ( PIN_INPUT_PULLDOWN | MUX_MODE0 )   /* (A15) mii1_rx_dv.gmii1_rxdv */
        0x12c ( PIN_INPUT_PULLDOWN | MUX_MODE0 )  /* (D14) mii1_tx_clk.gmii1_txclk */
        0x130 ( PIN_INPUT_PULLDOWN | MUX_MODE0 )  /* (D13) mii1_rx_clk.gmii1_rxclk */
        0x128 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* (B15) mii1_txd0.gmii1_txd0 */
        0x124 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* (A14) mii1_txd1.gmii1_txd1 */
        0x120 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* (C13) mii1_txd2.gmii1_txd2 */
        0x11c ( PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* (C16) mii1_txd3.gmii1_txd3 */
        0x140 ( PIN_INPUT_PULLDOWN | MUX_MODE0 )  /* (F17) mii1_rxd0.gmii1_rxd0 */
        0x13c ( PIN_INPUT_PULLDOWN | MUX_MODE0 )  /* (B16) mii1_rxd1.gmii1_rxd1 */
        0x138 ( PIN_INPUT_PULLDOWN | MUX_MODE0 )  /* (E16) mii1_rxd2.gmii1_rxd2 */
        0x134 ( PIN_INPUT_PULLDOWN | MUX_MODE0 )  /* (C14) mii1 */


		/* SLAVE 2*/
		0x78 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (A3) gpmc_be1n.gmii2_col */
		0x84 ( PIN_INPUT_PULLDOWN | MUX_MODE8 ) /* (F10) gpmc_csn2.gmii2_crs */
		0x74 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (B3) gpmc_wpn.gmii2_rxer */
		0x40 ( PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (C3) gpmc_a0.gmii2_txen */
		0x44 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (C5) gpmc_a1.gmii2_rxdv */
		0x58 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (E8) gpmc_a6.gmii2_txclk */
		0x5c ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (F6) gpmc_a7.gmii2_rxclk */
		0x54 ( PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (E7) gpmc_a5.gmii2_txd0 */
		0x50 ( PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (D7) gpmc_a4.gmii2_txd1 */
		0x4c ( PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (A4) gpmc_a3.gmii2_txd2 */
		0x48 ( PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (C6) gpmc_a2.gmii2_txd3 */
		0x6c ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (D8) gpmc_a11.gmii2_rxd0 */
		0x68 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (G8) gpmc_a10.gmii2_rxd1 */
		0x64 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (B4) gpmc_a9.gmii2_rxd2 */
		0x60 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (F7) gpmc_a8.gmii2_rxd3 */

	>;
};

	led_pins_default: led_pins_default {
		pinctrl-single,pins = <
			0x1d0 ( PIN_OUTPUT | MUX_MODE7 ) /* (AD24) cam1_data8.gpio4[8] */
			0x1d4 ( PIN_OUTPUT | MUX_MODE7 ) /* (AD25) cam1_hd.gpio4[9] */
			0x1d8 ( PIN_OUTPUT | MUX_MODE7 ) /* (AC23) cam1_vd.gpio4[10] */
			0x1dc ( PIN_OUTPUT | MUX_MODE7 ) /* (AE21) cam1_pclk.gpio4[11] */
			0x1e4 ( PIN_OUTPUT | MUX_MODE7 ) /* (AB25) cam1_wen.gpio4[13] */
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			0x148 (PIN_INPUT | PULL_DISABLE | MUX_MODE7)
			0x14c (PIN_INPUT | PULL_DISABLE | MUX_MODE7)
		>;
	};

         
    /*MMC 3 pins used to define SDIO interface for WLAN 1837*/   
	mmc3_pins_default: pinmux_mmc3_pins_default {
		pinctrl-single,pins = <
			0x210( PIN_INPUT_PULLUP | MUX_MODE1)      /* gpmc_clk.mmc2_clk */
			0x214( PIN_INPUT_PULLUP | MUX_MODE1)      /* gpmc_csn3.mmc2_cmd */
			0x218( PIN_INPUT_PULLUP | MUX_MODE1)      /* gpmc_a1.mmc2_dat0 */
			0x21C( PIN_INPUT_PULLUP | MUX_MODE1)      /* gpmc_a2.mmc2_dat1 */
			0x220( PIN_INPUT_PULLUP | MUX_MODE1)      /* gpmc_a3.mmc2_dat2 */
			0x224( PIN_INPUT_PULLUP | MUX_MODE1)      /* gpmc_be1n.mmc2_dat3 */
		>;
	};

	mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
		pinctrl-single,pins = <
			0xa10( PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_clk.mmc2_clk */
			0xa14( PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_csn3.mmc2_cmd */
			0xa18( PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a1.mmc2_dat0 */
			0xa1C( PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a2.mmc2_dat1 */
			0xa20( PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a3.mmc2_dat2 */
			0xa24( PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_be1n.mmc2_dat3 */
		>;
	};


	uart1_pins: uart1_pins {
		pinctrl-single,pins = <
        0x1e8 ( PIN_INPUT | MUX_MODE1 ) /* (AB20) cam1_data0.uart1_rxd */
        0x1ec ( PIN_OUTPUT| MUX_MODE1 ) /* (AC21) cam1_data1.uart1_txd */
        0x1f0 ( PIN_INPUT | MUX_MODE1 ) /* (AD21) cam1_data2.uart1_ctsn */
        0x1f4 ( PIN_OUTPUT | MUX_MODE1 ) /* (AE22) cam1_data3.uart1_rtsn */
        0x200 ( PIN_INPUT | MUX_MODE1 ) /* (AD23) cam1_data6.uart1_dcdn */
        0x1fc ( PIN_INPUT | MUX_MODE1 ) /* (AE23) cam1_data5.uart1_dsrn */
        0x204 ( PIN_OUTPUT| MUX_MODE1 ) /* (AE24) cam1_data7.uart1_dtrn */
        0x1f8 ( PIN_INPUT | MUX_MODE1 ) /* (AD22) cam1_data4.uart1_rin */
		>;
	};


    uart2_pins: uart2_pins {
  		pinctrl-single,pins = <
      	0x150 ( PIN_INPUT  | MUX_MODE1 )  /* (P23) spi0_sclk.uart2_rxd */
     	0x154 ( PIN_OUTPUT | MUX_MODE1 )  /* (T22) spi0_d0.uart2_txd */
        >; 
    }; 

	uart3_pins: uart3_pins {
		pinctrl-single,pins = <
			0x228 (PIN_INPUT | MUX_MODE0)		/* uart3_rxd.uart3_rxd */
			0x22c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
			0x230 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart3_ctsn.uart3_ctsn */
			0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
		>;
	};

    uart5_pins: uart5_pins {
        pinctrl-single,pins = <
            0xd8 ( PIN_INPUT | MUX_MODE4 ) /* (C17) dss_data14.uart5_rxd */
            0x144 (PIN_OUTPUT | MUX_MODE3 )  /* (A16) rmii1_ref_clk.uart5_txd */
    >;
 };

	gpio0_pins: gpio0_pins {
		pinctrl-single,pins = <
			0x26c (PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */
		>;
	};

	uart0_pins_default: uart0_pins_default {
		pinctrl-single,pins = <
			0x168 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0)
			0x16C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0)
			0x170 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
			0x174 (PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
		>;
	};

	uart0_pins_sleep: uart0_pins_sleep {
		pinctrl-single,pins = <
			0x168 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x16C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x170 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
			0x174 (PIN_INPUT_PULLDOWN | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
		>;
	};

	
	unused_pins: unused_pins {
		pinctrl-single,pins = <
	/*		0x54	(PIN_INPUT_PULLDOWN | MUX_MODE7) */
		/*	0x58	(PIN_INPUT_PULLDOWN | MUX_MODE7) */
/*			0x60	(PIN_INPUT_PULLDOWN | MUX_MODE7) */
/*			0x64	(PIN_INPUT_PULLDOWN | MUX_MODE7) */
	/*		0x68	(PIN_INPUT_PULLDOWN | MUX_MODE7) */
	/*		0x6C	(PIN_INPUT_PULLDOWN | MUX_MODE7) */  /*Used for ethernet 2 28_07_2017 */
			0x80	(PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.mmc1_clk */
	/*		0x84	(PIN_INPUT | PULL_DISABLE | MUX_MODE7) */ /* gpmc_csn2.mmc1_cmd */
		/*	0x150	(PIN_INPUT_PULLDOWN | MUX_MODE7) */
			0x190	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x194	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x198	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x19C	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x1A0	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x23C	(PIN_INPUT | PULL_DISABLE | MUX_MODE7)
			0x240	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x244	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x248	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x24C	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			//0x250	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			//0x254	(PIN_INPUT | PULL_DISABLE | MUX_MODE7)
			//0x258	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			//0x260	(PIN_INPUT | PULL_DISABLE | MUX_MODE7)
			//0x268	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x270	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x278	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x27C	(PIN_INPUT | PULL_DISABLE)
			0x2C8	(PIN_INPUT_PULLDOWN)
			0x2D4	(PIN_INPUT_PULLDOWN)
			0x2D8	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x2DC	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x2E0	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x2E4	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x2E8	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x2EC	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x2F0	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x2F4	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x2F8	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x2FC	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x300	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x304	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x308	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x30C	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x310	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x314	(PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x318	(PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	debugss_pins: pinmux_debugss_pins {
		pinctrl-single,pins = <
			0x290 (PIN_INPUT_PULLDOWN)
			0x294 (PIN_INPUT_PULLDOWN)
			0x298 (PIN_INPUT_PULLDOWN)
			0x29C (PIN_INPUT_PULLDOWN)
			0x2A0 (PIN_INPUT_PULLDOWN)
			0x2A4 (PIN_INPUT_PULLDOWN)
			0x2A8 (PIN_INPUT_PULLDOWN)
		>;
	};
};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	clock-frequency = <100000>;

	tps65218: tps65218@24 {
		reg = <0x24>;
		compatible = "ti,tps65218";
		interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
		interrupt-controller;
		#interrupt-cells = <2>;

		dcdc1: regulator-dcdc1 {
			compatible = "ti,tps65218-dcdc1";
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1144000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc2: regulator-dcdc2 {
			compatible = "ti,tps65218-dcdc2";
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1378000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc3: regulator-dcdc3 {
			compatible = "ti,tps65218-dcdc3";
			regulator-name = "vdcdc3";
			regulator-min-microvolt = <1500000>;
			regulator-max-microvolt = <1500000>;
			regulator-boot-on;
			regulator-always-on;
			regulator-state-mem {
				regulator-on-in-suspend;
			};
			regulator-state-disk {
				regulator-off-in-suspend;
			};
		};

		dcdc5: regulator-dcdc5 {
			compatible = "ti,tps65218-dcdc5";
			regulator-name = "v1_0bat";
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <1000000>;
			regulator-boot-on;
			regulator-always-on;
			regulator-state-mem {
				regulator-on-in-suspend;
			};
		};

		dcdc6: regulator-dcdc6 {
			compatible = "ti,tps65218-dcdc6";
			regulator-name = "v1_8bat";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-boot-on;
			regulator-always-on;
			regulator-state-mem {
				regulator-on-in-suspend;
			};
		};

		ldo1: regulator-ldo1 {
			compatible = "ti,tps65218-ldo1";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-boot-on;
			regulator-always-on;
		};
	};

};

&i2c1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins_default>;
};

&i2c2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;
	clock-frequency = <100000>;
};


&gpio0 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio0_pins>;
	status = "okay";

	p23 {
		gpio-hog;
		gpios = <23 GPIO_ACTIVE_HIGH>;
		/* SelEMMCorNAND selects between eMMC and NAND:
		 * Low: NAND
		 * High: eMMC
		 * When changing this line make sure the newly
		 * selected device node is enabled and the previously
		 * selected device node is disabled.
		 */
		output-low;
		line-name = "SelEMMCorNAND";
	};
};

&gpio1 {
	status = "okay";
};

&gpio2 {
	status = "okay";
};

&gpio3 {
	status = "okay";
};

&gpio4 {
	status = "okay";
};

&gpio5 {
	status = "okay";
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&evm_v3_3d>;
	bus-width = <4>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mmc1_pins>;
	pinctrl-1 = <&mmc1_sleep_pins>;
	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};


&mmc3 {
	status = "okay";
	/* these are on the crossbar and are outlined in the
	   xbar-event-map element */
	dmas = <&edma_xbar 30 0 1>,
		<&edma_xbar 31 0 2>;
	dma-names = "tx", "rx";
	vmmc-supply = <&vmmcwl_fixed>;
	bus-width = <4>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mmc3_pins_default>;
	pinctrl-1 = <&mmc3_pins_sleep>;
	cap-power-off-card;
	keep-power-in-suspend;
	ti,non-removable;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@0 {
		compatible = "ti,wl1837";
		reg = <2>;
		interrupt-parent = <&gpio4>;
		interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
	};
};

&uart0 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart0_pins_default>;
	pinctrl-1 = <&uart0_pins_sleep>;
};


&uart1 {
       status = "okay";
       pinctrl-names = "default";
       pinctrl-0 = <&uart1_pins>;
};

&uart2 {
       status = "okay";
       pinctrl-names = "default";
       pinctrl-0 = <&uart2_pins>;
};

&uart3 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
};

&uart5 {
       status = "okay";
       pinctrl-names = "default";
       pinctrl-0 = <&uart5_pins>;
};

/*Enabling SPI INterfaces*/

&spi2 {
       status = "okay";
       pinctrl-names = "default";
       pinctrl-0 = <&gps_spi_2_pins_default>;
};

&spi4 {
       status = "okay";
       pinctrl-names = "default";
      pinctrl-0 = <&subghz_spi_4_pins_default>;
};


&qspi {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&qspi_pins>;

	spi-max-frequency = <48000000>;
	m25p80@0{
		compatible = "mx66l1g45g";
		spi-max-frequency = <48000000>;
		reg = <0>;
		spi-cpol;
		spi-cpha;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
		#address-cells = <1>;
		#size-cells = <1>;

		/* MTD partition table.
		 * The ROM checks the first 512KiB
		 * for a valid file to boot(XIP).
		 */
		partition@0 {
			label = "QSPI.U_BOOT";
			reg = <0x00000000 0x000080000>;
		};
		partition@1 {
			label = "QSPI.U_BOOT.backup";
			reg = <0x00080000 0x00080000>;
		};
		partition@2 {
			label = "QSPI.U-BOOT-SPL_OS";
			reg = <0x00100000 0x00010000>;
		};
		partition@3 {
			label = "QSPI.U_BOOT_ENV";
			reg = <0x00110000 0x00010000>;
		};
		partition@4 {
			label = "QSPI.U-BOOT-ENV.backup";
			reg = <0x00120000 0x00010000>;
		};
		partition@5 {
			label = "QSPI.KERNEL";
			reg = <0x00130000 0x0800000>;
		};
		partition@6 {
			label = "QSPI.FILESYSTEM";
			//reg = <0x00930000 0x36D0000>;
			reg = <0x00930000 0x3B00000>;
			//reg = <0x00930000 0x7300000>;
		};
	};
};


&usb2_phy1 {
	status = "okay";
};

&usb1 {
	dr_mode = "otg";
	status = "okay";
};

&usb2_phy2 {
	status = "okay";
};

&usb2 {
	dr_mode = "host";
	status = "okay";
};

&mac {
	slaves = <2>; 
	pinctrl-names = "default";
	pinctrl-0 = <&cpsw_default>; 
	status = "okay";
	dual_emac = <1>;
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
};

&cpsw_emac0 { 
	phy_id = <&davinci_mdio>, <2>; 
	phy-mode = "mii"; 
	dual_emac_res_vlan = <1>;
}; 


&cpsw_emac1 {
	phy_id = <&davinci_mdio>,<3>; 
	phy-mode = "mii";
	dual_emac_res_vlan = <2>; 
 };  


&elm {
	status = "okay";
};


&rtc {
	clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
	clock-names = "ext-clk", "int-clk";
	system-power-controller;
	status = "okay";
};

&wkup_m3_ipc {
	ti,set-io-isolation;
	ti,scale-data-fw = "am43x-evm-scale-data.bin";
};


&cpu {
	cpu0-supply = <&dcdc2>;
};
7776.config.txt1401.demsg.txt

  • The following error indicates a memory access error:

    [ 54.195514] 44000000.ocp:L3 Standard Error: MASTER TPTC0 Read TARGET GPMC (Read Link): At Address: 0x343B9000 : Data Access in User mode during Functional access
    [ 54.210011] Modules linked in:

    check that your filesystem is properly setup and flashed (or memory map is properly configured in the DTS file).