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AM3352: TPS65217D usage with ZCE package

Part Number: AM3352
Other Parts Discussed in Thread: TPS65217, TPS650250

Hi TI Experts,

In one of the our project, we need to interface ZCE package processor with DDR3L memory. For that, we want to use TPS65217 PMIC.

So can you suggest exactly which part variant has to be used of TPS65217 (Ex. A,B,C or D).

Additionally, user guide named as "Powering the AM335x with the TPS65217x" had table as per below image which indicates of interfacing DDR3L with ZCZ package.

Reference MFG Part No for Processor : AM3352BZCEA30

Kindly guide us how to interface ZCE package processor and DDR3L memory with TPS65217 PMIC and if any schematic reference is available for same please share us.

Regards,

Krushang Gandhi

  • Hi,

    Obviously A and B versions are unsuitable, as they are designed for DDR2 memory. C or D versions will both work with DDR3L, as this memory is backward compatible with DDR3 and works both at 1.35V and 1.5V. As for the ZCE package, I believe this has been already discussed in the thread you refer: e2e.ti.com/.../634093
  • Hi Biser,

    Thanks for feedback.

    We believe that C & D versions are only suitable for ZCZ package as per above image and DDR3L interface.

    So, can you please confirm us that , D version can be interfaced with ZCE package + DDR3L Interface?

    Also provide us reference schematic if available.
  • It is possible to use the ZCE package with the D version. You will connect VDD_CORE to the DCDC3 as shown in the connection diagram for TPS65217 C/D. And DCDC2 will not be connected. The TPS650250 is also an option for this SoC.

  • Hi Ahmad,

    Thanks for suggestion and feedback.

    What I understand is that your reference is of Figure-1 which is applicable for variant type "a" of User Guide(Powering the AM335x with the TPS65217x) as per below image. For this, it is for DDR2 interface which operates at 1.8V and in our case the memory type is DDR3L which operates at 1.35V.

    Can you please confirm us that same(sorting of VDD_CORE &  VDD_MPU ) is applicable for version D as well and it is tested in any of the design from TI side?

    Thanks & Regards,

    Krushang Gandhi

  • Hi Biser,

    Additional to above point, does ZCE package Microprocessor + DDR3L interface is tested in any of the design at TI side with variant D of PMIC?

    Regards,
    Krushang Gandhi
  • From that user guide please compare Figure 1 and Figure 5. Notice the supply groupings on the AM335x side are consistent (except for VDDS + VDDS_RTC... more on that later). However the supply assignment for each group will change between version A and C / D. So let it be clear. For the TPS65217C / D PMIC you will follow the C / D diagram in Figure 5. It will not make sense to follow the diagram for A.

    In the C / D diagram you'll see VDDS connected to LDO1 with VDDS_RTC. This is because the C / D PMIC does not support RTC only mode, FYI.

    Using ZCE with rev C or D has not been tried internally however. 

  • Hi Ahmad,

    Thanks for your response.

    Please let us know if in case any planning of testing is there of rev D PMIC with ZCE+DDR3L combination.

    Regards,

    Krushang

  • This is a somewhat common question so I will build a proposal for us to look into a reference design.