This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

P/N TMS320C6701GJCA120 interfacing to two flash devices

My name is Tom Walker.  

I am currently planning to use two flash devices (16 bits each) to interface with the TI DSP p/n TMS320C6701GJCA120.   I plan to use a quantity of two flash components p/n M29W320DT-70N6 (see attached data sheet).8880.M29W320DT70N6.pdf

One part will be used for data bits D0-D15 and the second part will be used for data bits D16-D31.   My concern is both memory devices may not respond simultaneously to the control signals of the flash components.   Currently, I have the control signals (read, write, and chip enable) routed from the DSP directly to each flash device using the same exact control signals for each flash device (same read for each flash chip, etc.).  How does TI recommend that I interface to two flash components in my particular application?

Thanks much,

Tom Walker

 

  • The only way I could see the devices responding differently would be if one was asserting the BUSY signal for a longer duration than the other. In this case, you can AND the BUSY signals together before connecting to the DSP to assure the DSP doesn't continue before both device are ready.

    Are there any other situations you are concerned about?

    Jeff