Dear all,
I am playing with a DM365 DVEVM, using kernel 2.6.32rc2 (as packaged with DVSDK 2.1) and I am a bit confused regarding the following lines in /include/mach/serial.h:
#define DAVINCI_MAX_NR_UARTS 3
#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
// #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) //NICK_MOD
#define DAVINCI_UART2_BASE (IO_PHYS + 0x106000) //NICK_MOD
I can see how DAVINCI_UART0_BASE's IO_PHYS + 0x20000 = 0x01C2 0000 which is correct for UART0 as per Table 7 Page 27 SPRUFG5A. Looking however at the next two defined BASE addresses we have
- DAVINCI_UART1_BASE at IO_PHYS + 0x20400 = 0x01C2 0400 which refers to 'Reserved' (as per Table 7 Page 27 SPRUFG5A) and
- DAVINCI_UART2_BASE at IO_PHYS + 0x20800 = 0x01C2 0800 which refers to 'Timer3' (as per Table 7 Page 27 SPRUFG5A).
After quite a bit of mucking around I consequently changed DAVINCI_UART2_BASE of these (for no particular reason over DAVINCI_UART1_BASE) to reflect an OFFSET of 0x106000 and point to UART1 as per Table 7 Page 28 SPRUFG5A. (I also needed to make a dm365.c change). This has however now seemed to work.
Can someone please clarify that this is an error in serial.h & my logic is in fact correct? Another side Q is why MAX_NR_UARTS is 3? Due to the possibility of two different UART1's? There is no way to achieve three simultaneous uarts though is there?
Many thanks.
Sincerely,
NickA