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Original question:

Interface THS1206 ADCparallely to TMS320C6748 LCDK using External Memory Interface line provided as GPIOs

RTOS/TMDSLCDK6748: TMS320C6748 LCDK External ADC possible SPI interface speed

Jay Park
Prodigy 180 points
Part Number: TMDSLCDK6748
Other Parts Discussed in Thread: OMAPL138, ADS131A04

Tool/software: TI-RTOS

Hello,

I would like to attach external ADC to LCDK6748. 

After considering ADC component price and BIOS driver support, I hope to use SPI ADC. The required SPI interface bit rate is around 2Mbps.

100kHz sampling rate is not high for ADC. And, 2Mbps is not high for SPI interface.

Meanwhile, I am not certain whether SPI BIOS driver can handle this real time clock data based on BIOS environment without discontinuity.

It would be very helpful for us if you give us advice regarding programming high speed SPI ADC based on LCDK 6748 BIOS environment.

I appreciate your attention and look forward to your comments.

  • 0
    TI__Guru**** 161600 points
    Hi,

    I've notified the RTOS team. They will post their feedback directly here.

    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    TI__Mastermind 27355 points
    Hello,

    2MHz should not be a problem for the SPI driver. Refer to our SPI examples in Processor SDK:

    software-dl.ti.com/.../Device_Drivers.html

    We also have a CSL example for the ADC. It can be found at ~\pdk_omapl138_1_0_5\packages\ti\csl\example\adc
  • 0 in reply to Sahin Okur
    Prodigy 180 points
    Hello Sahin Okur,

    Thank you for kind answer with helpful information.
    The processor SDK SPI device driver website is very helpful for us. Meanwhile, it looks like that the CSL example is for operating audio ADC inside C6748. Actually, we would like to interface external 4CH SPI ADC such as ADS131A04.
    10 ~ 100kHz sampling rate is not high for ADC. But, we are not sure that we can get every ADC samples without missing sampled data.
    We think that you should use ADC as SPI slave.

    If sampling rate is 10kHz,my understanding is that following program lines should be performed within 100usec in order not to miss any sample data.

    transferOK = SPI_transfer(spi, &spiTransaction); /* Perform SPI transfer */
    My_nth_sample_ADC_DATA_BUFFER = spiTransaction.rxBuf ;

    And, we will transfer the sampled data through C6748 ethernet interface whenever C6748 has 10,000 AD samples, aproximately every 1 sec.
    Could you let me know whether BIOS can handle above program well below 100usec?

    I appreciate your kind answers as always.