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RTOS/AM5716: L1D bug in bootloader

Butters
Expert 2021 points
Part Number: AM5716

Tool/software: TI-RTOS

Hello,

My colleague found a typo in pdk_am57xx_1_0_11\packages\ti\boot\sbl\src\rprc\sbl_rprc.c. The typo prevents initialized sections from being loaded to L1D memory.

Without fix With fix (3 changes in red)

case DSP1_ID:

if ((section.addr >= SOC_DSP_L2_BASE) &&
    (section.addr < (SOC_DSP_L2_BASE + 0x48000)))
{
    /* L2 RAM Read the offset */
    section.addr = section.addr - SOC_DSP_L2_BASE;
    section.addr = MPU_DSP1_L2_RAM + section.addr;
}
else if ((section.addr >= SOC_DSP_L1P_BASE) &&
         (section.addr < (SOC_DSP_L1P_BASE + 0x8000)))
{
    /* CSL_MPU_DSP1_L1P_CACHE Read the offset */
    section.addr = section.addr - SOC_DSP_L1P_BASE;
    section.addr = MPU_DSP1_L1P_CACHE + section.addr;
}
else if ((section.addr >= SOC_DSP_L2_BASE) &&
         (section.addr < (SOC_DSP_L2_BASE + 0x8000)))
{
    /* CSL_MPU_DSP1_L1D_CACHE */
    section.addr = section.addr - SOC_DSP_L2_BASE;
    section.addr = MPU_DSP1_L1D_CACHE + section.addr;
}
else
{
    UART_puts("DSP1 - Invalid Memory section", -1);
}

 

case DSP1_ID:

if ((section.addr >= SOC_DSP_L2_BASE) &&
    (section.addr < (SOC_DSP_L2_BASE + 0x48000)))
{
    /* L2 RAM Read the offset */
    section.addr = section.addr - SOC_DSP_L2_BASE;
    section.addr = MPU_DSP1_L2_RAM + section.addr;
}
else if ((section.addr >= SOC_DSP_L1P_BASE) &&
(section.addr < (SOC_DSP_L1P_BASE + 0x8000)))
{
    /* CSL_MPU_DSP1_L1P_CACHE Read the offset */
    section.addr = section.addr - SOC_DSP_L1P_BASE;
    section.addr = MPU_DSP1_L1P_CACHE + section.addr;
}
else if ((section.addr >= SOC_DSP_L1D_BASE) &&
         (section.addr < (SOC_DSP_L1D_BASE + 0x8000)))
{
    /* CSL_MPU_DSP1_L1D_CACHE */
    section.addr = section.addr - SOC_DSP_L1D_BASE;
    section.addr = MPU_DSP1_L1D_CACHE + section.addr;
}
else
{
    UART_puts("DSP1 - Invalid Memory section", -1);
}

Best regards,
Dave

  • 0
    TI__Guru**** 393215 points
    The RTOS team have been notified. They will respond here.
  • 0
    TI__Guru** 116170 points
    Dave,

    Agreed. That clearly is a bug in the code and should match implementation for DSP2 in sbl_rprc.c which is done correctly for AM572x and AM574x devices in that file. I suspect that this has not been reported by our system test team as almost all the DSP binaries in the SDK either run code/data either from L2, OCMC or DDR memory.

    I have filed a bug for this issue and will push the fix into the SDK to pick up. We are pretty close to code freeze for Processor SDK 5.01 but I will update the post in case the fix will not make it into that release.

    you can track the bug fix using bug ID PRSDK-4546 for tracking fix for this issue in the TRM.

    Regards,
    Rhul