Hi Sitara support team,
Regarding NANDI2C boot mode in TRM, it describes "ROM accesses the I2C EEPROM
at I2C slave address 0x50 and reads 7 bytes starting from address offset 0x80."
At this time, the address offset 0x80 is sent 16-bit width from AM335x?
[Status]
-My customer uses ST micro EEPROM; m24c16-w.
-SYSBOOT is "41F3H(0100/0001/1111/0011)" including NANDI2C boot.
-Their boot mode is NAND. But it is failed, it starts NANDI2C boot
and it write "80h" at EEPROM Address 0h.
-Customer uses EEPROM address 0h for the MAC address for their system.
-This issue makes to change the MAC address.
-Custom board cannot change the SYSBOOT setting "41F3H(0100/0001/1111/0011)".
-Here is the image of the actual waveform data to EEPROM at NANDI2C boot.
Best regards,
Kanae