GPTimers: TISR status bit not cleared with InterruptDone

MGun

Hi community

I observed the following behaviour:
My IST receives the interrupt and signals the completion of interrupt processing with "InterruptDone()".
However, by only invoking "InterruptDone()" the WaitForSingleObject returns immediately even there is no hardware interrupt pending.
The TISR status bit is remains unchanged and the while loop executes as fast as possible.

// Associate this thread with the registered event. 
MyISTRoutine(HANDLE hEvent) {
  InterruptDone(InterruptId);
  while (1) {
    WaitForSingleObject(hEvent, INFINITE); 
    // Check for thread exit signal and exit if set
    // Interrupt processing here.
    // On completion, call InterruptDone.
    InterruptDone(InterruptId);
    // Loop and wait for the kernel to set the event.
  }
}

By unmasking the TISR register manually, the Thread only wakes up after the hardware interrupt gets fired (which is correct).

// Associate this thread with the registered event. 
MyISTRoutine(HANDLE hEvent) {
  PHYSICAL_ADDRESS pa;
pa.QuadPart = OMAP_GPTIMER4_REGS_PA;
volatile OMAP_GPTIMER_REGS* pTimerReg = reinterpret_cast<OMAP_GPTIMER_REGS*>(MmMapIoSpace(pa, sizeof(OMAP_GPTIMER_REGS),FALSE));
  InterruptDone(InterruptId);
  while (1) {
    WaitForSingleObject(hEvent, INFINITE); 
    // Check for thread exit signal and exit if set
    // Interrupt processing here.
    // On completion, call InterruptDone.
    // clear all interrupts flags
    OUTREG32(&pTimerReg->TISR, 0x07);
    InterruptDone(InterruptId);
    // Loop and wait for the kernel to set the event.
  }
}

Question:
Is it the responsibility of the IST or the InterruptDone to clear the TISR status bit?

Thanks

over 14 years ago

0 Vitaly Andrianov over 14 years ago

TI__Prodigy 260 points

Hi,

I think that is the IST responsibility. The InterruptDone knows about interrupt controller only.

Regards, -Vitaly

0 MGun over 14 years ago in reply to Vitaly Andrianov

Intellectual 895 points

Hi Vitaly

Thank you!

0 MGun over 14 years ago in reply to MGun

Intellectual 895 points

I had a look at the BSP implementation of GPIO interrupts.

Question:
Why is the interrupt flag cleared by calling "InterruptDone" for GPIO interrupts, but not for all the other modules like GPTimer?
Am i correct that it is not required to clear the GPIO Interrupt Status Register, but for all the other modules it is the responsibility of the IST?

Example for GPIO IST:

MyISTRoutine(HANDLE hEvent) {
InterruptDone(InterruptId);
while (1) {
    WaitForSingleObject(hEvent, INFINITE);
    // On completion, call InterruptDone.
    InterruptDone(InterruptId);
    // Loop and wait for the kernel to set the event.
}
}

When i check for the IRQSTATUS1 after the interrupt has fired, it is already cleared.

MyISTRoutine(HANDLE hEvent) {
UINT32 interruptMask; PHYSICAL_ADDRESS pa; pa.QuadPart = OMAP_GPIO6_REGS_PA;
volatile OMAP_GPIO_REGS* pGpioReg = reinterpret_cast<OMAP_GPIO_REGS*>(MmMapIoSpace(pa, sizeof(OMAP_GPIO_REGS),FALSE));
InterruptDone(InterruptId);
while (1) {
    WaitForSingleObject(hEvent, INFINITE);
    interruptMask = INREG32(&pGpioReg->IRQSTATUS1);
    // On completion, call InterruptDone.
    InterruptDone(InterruptId);
    // Loop and wait for the kernel to set the event.
}
}

0 Vitaly Andrianov over 14 years ago in reply to MGun

TI__Prodigy 260 points

Hi,

I think the GPIO interrupt support is an extension of the SoC interrupt controller, where the GPIO lines may be used as external interrupt inputs. If the GPIO input is used as an external interrupt the BSP considers it as a part of interrupt controller and clears its status on the InterruptDone().

Regarding the GPtimer(). Im not sure whether the BSP doesn't need to clear the interrupt bit. If the timer is used as a system timer there is no IST for it and the timer's ISR may have to clear the bit.

Rgeards, -Vitaly

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GPTimers: TISR status bit not cleared with InterruptDone