DM355 not booting from NAND

Gennadiy Kiryukhin

Other Parts Discussed in Thread: TMS320DM355

I have a custom DM355 board with mDDR on it. I changed the SD Card flashing tool to boot with mDDR access. The tool seems to work fine. I am able to erase and "install" the UBL, UBoot, Kernal and root file system. I can boot from NAND through option 4 in the SD card flashing tool.

However, I cannot boot from the NAND flash directly (boot pins set to 00). It appears to attempt booting from NAND and then proceeds to boot from SD as if the UBL was not found. SD Card tools reports the device ID =0xDA (which matches the datasheet) which is present in the device ID table for the chip. I does not appear to be the UBL itself because the processor moves on to SD boot (according to the DM355 documentation , when a valid UBL cannot be loaded during NAND BOOT).

In summary: GPIO0 is logic high during and after reset, NAND device should be supported by the chip, UBL is programmed by the SD Flashing tool without errors, but no boot from NAND, after about a second (or so) SD boot is launches.

"TMS320DM355 (DMSoC) ARM Subsystem" has a very encrypted description. It also says:

Only 8_bit NAND boot is supported - AECFG[3:0] = 1XXXb.

I even tried to add an external pull-up on AECFG[3] just to make sure even thought the datasheet says that the pin has a pull-up.

What could prevent the chip from booting from NAND. Is there a document that has a good description of AECFG[3:0] signals?

over 15 years ago

0 Miguel A. Alanis over 15 years ago

TI__Genius 9490 points

Gennadiy,

Can you share with us what silicon revision of DM355 are you using? You can identify that by looking at the symbol of the package and decipher it as mentioned in the device errata document. (http://focus.ti.com/lit/er/sprz264e/sprz264e.pdf, page6)

The datasheet describes the AECFG{3:0] signals in Table 2-23 and also BOOTCFG register (page 132), the ARM SS ugide also has additional details on the pinmux registers regarding the effects of the AECFG[3:0] signals tieoffs during boot in ARM SS guide page 128.

regards,

miguel

0 Gennadiy Kiryukhin over 15 years ago in reply to Miguel A. Alanis

Expert 2800 points

It is 1.1 (TMS320 DM355ZCE A216).

0 Gennadiy Kiryukhin over 15 years ago in reply to Gennadiy Kiryukhin

Expert 2800 points

The documentation you referred to does not give a clear explanation on those signals. For example:

"- Only 8_bit NAND boot is supported _ AECFG[3:0] = 1XXXb". What is X? Don't care or depends on my NAND configuration/hookup...?

"AECFG[0] - AEMIF Address bus width (0 = A{13:3] and A[0], BA1". Is that relevant to nand flash boot or only for OneNAND? If my nand is using A2,A1, do I have to set this bit to 1?

0 Gennadiy Kiryukhin over 15 years ago in reply to Gennadiy Kiryukhin

Expert 2800 points

A little update:

It is no longer switching to SD boot. It may be trying to load and run the UBL from NAND now. That might have started happening after I changed the GPOI0 state to 1 on power-up.

SD Card Boot tool is saying the following during programming:

Assuming GNU UBL UBL_GNU_ENTRY=0x00000100

My UBL was compiled in CCS4. I looked in the .cmd file and it had the following

UBL_I_TEXT (RX) : origin = 0x00000100 length = 0x00004300
....

UBL_F_TEXT (R) : origin = 0x020000E0 length = 0x00004300
....

.text : load = UBL_F_TEXT, run = UBL_I_TEXT, LOAD_START(FLASHTEXTStart), LOAD_SIZE(FLASHTEXTSize)
{
    *(.boot)
    . = align(4);
    *(.text)
    . = align(4);
}

Does that mean that the entry point for UBL is 0x00100?

0 Miguel A. Alanis over 15 years ago in reply to Gennadiy Kiryukhin

TI__Genius 9490 points

Gennadiy,

-8Bit NAND Boot is the only 8bit NAND boot mode supported by the RBL(rom bootloader).

-AECFG[3:0]= 1XXXb, 'X' means don't care, for 8b NAND bootmode does not use the Address lines configured by AECFG[2:1]- pins or the AECFG[0] pin.

-"AECFG[0] - AEMIF Address bus width (0 = A{13:3] and A[0], BA1". Is that relevant to nand flash boot or only for OneNAND? If my nand is using A2,A1, do I have to set this bit to 1? miguel-> yes this is only relevant for OneNAND mode during boot mode, no need this bit becomes a don't care so if a 1 or 0, it doesn't matter in NAND flash 8b mode.

regards,

miguel

0 Gaurav Agarwal over 15 years ago in reply to Miguel A. Alanis

TI__Expert 3425 points

Gennadiy,

Can you please provide details of the NAND you are using (Pages per block, Page size, address cycles etc from the NAND datahseet)? This information should match the information populated for ID 0xDA in the NAND device table in ARM subsytem Guide (Table 11-7) for RBL to be able to work with the raw NAND (for 0xDA, it is 2048, 64, 5 respectively).

Also what is the source and version of Flash utility and UBL?

Thanks,
Gaurav

0 Gennadiy Kiryukhin over 15 years ago in reply to Gaurav Agarwal

Expert 2800 points

Flash chip is Micron MT29F2G08AAD: Pages per block=64, Block side 2048+64, 5 address cycles matches with the record for the chip).

I use UBL that I downloaded from the DVSDK 3.1. I had the project opened in CCS4. I had to edit a couple of files to get it to compile all the way through (changed enviroment confoguration in include path to hex470.exe, and edited the post-compile .bat file to reference proper path for input and output files. I also replaced device.h and device.c with the ones posted somewhere on this forum to make UBL compatible with mDDR.

The project compiles and the bin file is generated. However, my UBL binary output file (.bin) is only about 8K in size compared to 13K for the one that came with SD card flash utility.

I used those exact same files (device.h and device.c) in the SD Card Programming utility. The utility compiles and workes (except that my UBL does not boot).

Does anybody know how I can figure out the format of the .bin file in relation to the .cmd file in UBL project? I would like to verify that the call (jump to) address has the correct value in the UBL header structure. Where can I find a description of the .cmd file structure used in CCS4?

I also noticed that UBL has a selfcopy function. However that function does not seem to be called from anywhere. Is that for OneNAND boot configuration?

0 Gennadiy Kiryukhin over 15 years ago in reply to Gennadiy Kiryukhin

Expert 2800 points

Here is the content of the Map file. Is that code allocation correct? There are several broken segments. Do they get properly translated into the .bin file?

******************************************************************************
                  TMS470 Linker PC v4.6.3
******************************************************************************
>> Linked Mon Nov 08 16:45:00 2010

OUTPUT FILE NAME:   <C:/Projects/flash_utils/DM35x_Rev_C/CCS/UBL/UBL_NAND/UBL_DM355_NAND_216.out>
ENTRY POINT SYMBOL: "boot" address: 00000100

MEMORY CONFIGURATION

         name            origin    length      used     unused   attr    fill
---------------------- -------- --------- -------- -------- ---- --------
ARM_I_IVT             00000000   00000020 00000000 00000020 R X
UBL_I_SELFCOPY        00000020   000000e0 00000000 000000e0 R X
UBL_I_TEXT            00000100   00004300 00002e98 00001468 R X
UBL_D_SELFCOPY        00010020   000000e0 00000000 000000e0 RW
UBL_D_TEXT            00010100   00004300 00000000 00004300 RW
UBL_D_DATA            00014400   00000400 00000160 000002a0 RW
UBL_BSS               00014800   00000400 00000024 000003dc RW
UBL_STACK             00014c00   00000400 00000000 00000400 RW
UBL_F_SELFCOPY        02000000   000000e0 00000068 00000078 R X
UBL_F_TEXT            020000e0   00004300 00002e98 00001468 R
UBL_F_DATA            020043e0   00000400 00000160 000002a0 R
UBL_DRAM              80000000   10000000 00000000 10000000 RW X

SEGMENT ALLOCATION MAP

run origin load origin   length   init length attrs members
---------- ----------- ---------- ----------- ----- -------
00000100    020000e0    00002e98   00002e98    r-x
00000100    020000e0    00002e98   00002e98    r-x .text
00014400    020043e0    00000160   00000160    r--
00014400    020043e0    00000160   00000160    r-- .data
00014800    00014800    00000024   00000000    rw-
00014800    00014800    00000024   00000000    rw- .bss
02000000    02000000    00000068   00000068    r-x
02000000    02000000    00000068   00000068    r-x .selfcopy

SECTION ALLOCATION MAP

output                                  attributes/
section   page    origin      length       input sections
-------- ---- ---------- ----------   ----------------
.bss       0    00014800    00000024     UNINITIALIZED
                  00014800    00000018     nandboot.obj (.bss)
                  00014818    00000008     ubl.obj (.bss)
                  00014820    00000004     util.obj (.bss)

.selfcopy
*          0    02000000    00000068
                  02000000    00000068     selfcopy.obj (.selfcopy)

.text      0    020000e0    00002e98     RUN ADDR = 00000100
                  020000e0    00000050     boot.obj (.boot)
                  02000130    000016e0     nand.obj (.text)
                  02001810    000008f4     device.obj (.text)
                  02002104    000004c4     device_nand.obj (.text)
                  020025c8    00000354     uart.obj (.text)
                  0200291c    00000228     util.obj (.text)
                  02002b44    0000020c     nandboot.obj (.text)
                  02002d50    000001dc     ubl.obj (.text)
                  02002f2c    0000004b     debug.obj (.text)
                  02002f77    00000001     --HOLE-- [fill = 000000ff]

.data      0    020043e0    00000160     RUN ADDR = 00014400
                  020043e0    000000d8     device_nand.obj (.const:DEVICE_NAND_CHIP_infoTable)
                  020044b8    00000048     device_nand.obj (.const:DEVICE_NAND_PAGE_layout)
                  02004500    0000002c     device_nand.obj (.const)
                  0200452c    00000008     device.obj (.const)
                  02004534    00000006     device.obj (.const:.string)
                  0200453a    00000006     --HOLE-- [fill = 000000ff]

.ddr_mem   0    80000000    10000000     DSECT
                  80000000    10000000     --HOLE--

GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name

address    name
--------   ----
10000000   DDRSize
80000000   DDRStart
00002f74   DEBUG_printHexInt
00002f6c   DEBUG_printString
00002f50   DEBUG_readChar
00002f4c   DEBUG_readString
00001c8c   DEVICE_DDR2Init
00001db0   DEVICE_EMIFInit
00001e24   DEVICE_I2C0Init
0000201c   DEVICE_I2C0Reset
00001c14   DEVICE_LPSCTransition
00014540   DEVICE_NAND_BB_info
00014400   DEVICE_NAND_CHIP_infoTable
00014520   DEVICE_NAND_ECC_info
000144d8   DEVICE_NAND_PAGE_layout
00001a08   DEVICE_PLL1Init
00001b58   DEVICE_PLL2Init
00001858   DEVICE_PSCInit
00001dec   DEVICE_TIMER0Init
00001fe8   DEVICE_TIMER0Start
00001fd8   DEVICE_TIMER0Status
00001fb0   DEVICE_TIMER0Stop
00001d60   DEVICE_UART0Init
00001f9c   DEVICE_bootMode
00001f84   DEVICE_emifBusWidth
00001e54   DEVICE_init
00001830   DEVICE_pinmuxControl
00008000   DRAMSize
00010000   DRAMStart
02000000   EMIFSize
02000000   EMIFStart
90000000   EXTERNAL_RAM_END
80000000   EXTERNAL_RAM_START
00000160   FLASHDATASize
020043e0   FLASHDATAStart
00002e98   FLASHTEXTSize
020000e0   FLASHTEXTStart
00008000   IRAMSize
00000000   IRAMStart
00002b64   NANDBOOT_copy
000016bc   NAND_badBlockCheck
000014bc   NAND_badBlockMark
00001628   NAND_eraseBlocks
00001574   NAND_eraseBlocks_with_bb_check
000016ac   NAND_globalErase
00001618   NAND_globalErase_with_bb_check
00001448   NAND_isWriteProtected
00001350   NAND_open
00000ec4   NAND_protectBlocks
00000b44   NAND_readPage
00000a04   NAND_readSpareBytesOfPage
00000eac   NAND_reset
00000e24   NAND_unProtectBlocks
00000d6c   NAND_verifyBlockErased
00000cc8   NAND_verifyPage
00000874   NAND_writeOnlySpareBytesOfPage
00000634   NAND_writePage
000003d4   NAND_writePage_ubl_header
00018000   STACKStart
000028a4   UART_checkSequence
000027a8   UART_recvHexData
0000278c   UART_recvString
000026e8   UART_recvStringN
000026a0   UART_sendHexInt
0000261c   UART_sendString
0000296c   UTIL_allocMem
00002aec   UTIL_buildCRC16Table
00002a94   UTIL_buildCRC32Table
00002a14   UTIL_calcCRC16
000029d8   UTIL_calcCRC32
000029ac   UTIL_callocMem
00002960   UTIL_getCurrMemPtr
00002954   UTIL_setCurrMemPtr
0000293c   UTIL_waitLoop
0000293c   UTIL_waitLoopAccurate
00000100   __TI_static_base__
ffffffff   __binit__
ffffffff   __c_args__
00010020   __selfcopydest
02000000   __selfcopysrc
02004540   __selfcopysrcend
02000050   _dramstart
0200005c   _selfcopydest
02000058   _selfcopysrc
02000060   _selfcopysrcend
00000148   _stack
ffffffff   binit
00000100   boot
00014550   devString
0001481c   gEntryPoint
00014800   gNandBoot
00002e30   main
02000000   selfcopy

GLOBAL SYMBOLS: SORTED BY Symbol Address

address    name
--------   ----
00000000   IRAMStart
00000100   __TI_static_base__
00000100   boot
00000148   _stack
00000160   FLASHDATASize
000003d4   NAND_writePage_ubl_header
00000634   NAND_writePage
00000874   NAND_writeOnlySpareBytesOfPage
00000a04   NAND_readSpareBytesOfPage
00000b44   NAND_readPage
00000cc8   NAND_verifyPage
00000d6c   NAND_verifyBlockErased
00000e24   NAND_unProtectBlocks
00000eac   NAND_reset
00000ec4   NAND_protectBlocks
00001350   NAND_open
00001448   NAND_isWriteProtected
000014bc   NAND_badBlockMark
00001574   NAND_eraseBlocks_with_bb_check
00001618   NAND_globalErase_with_bb_check
00001628   NAND_eraseBlocks
000016ac   NAND_globalErase
000016bc   NAND_badBlockCheck
00001830   DEVICE_pinmuxControl
00001858   DEVICE_PSCInit
00001a08   DEVICE_PLL1Init
00001b58   DEVICE_PLL2Init
00001c14   DEVICE_LPSCTransition
00001c8c   DEVICE_DDR2Init
00001d60   DEVICE_UART0Init
00001db0   DEVICE_EMIFInit
00001dec   DEVICE_TIMER0Init
00001e24   DEVICE_I2C0Init
00001e54   DEVICE_init
00001f84   DEVICE_emifBusWidth
00001f9c   DEVICE_bootMode
00001fb0   DEVICE_TIMER0Stop
00001fd8   DEVICE_TIMER0Status
00001fe8   DEVICE_TIMER0Start
0000201c   DEVICE_I2C0Reset
0000261c   UART_sendString
000026a0   UART_sendHexInt
000026e8   UART_recvStringN
0000278c   UART_recvString
000027a8   UART_recvHexData
000028a4   UART_checkSequence
0000293c   UTIL_waitLoop
0000293c   UTIL_waitLoopAccurate
00002954   UTIL_setCurrMemPtr
00002960   UTIL_getCurrMemPtr
0000296c   UTIL_allocMem
000029ac   UTIL_callocMem
000029d8   UTIL_calcCRC32
00002a14   UTIL_calcCRC16
00002a94   UTIL_buildCRC32Table
00002aec   UTIL_buildCRC16Table
00002b64   NANDBOOT_copy
00002e30   main
00002e98   FLASHTEXTSize
00002f4c   DEBUG_readString
00002f50   DEBUG_readChar
00002f6c   DEBUG_printString
00002f74   DEBUG_printHexInt
00008000   DRAMSize
00008000   IRAMSize
00010000   DRAMStart
00010020   __selfcopydest
00014400   DEVICE_NAND_CHIP_infoTable
000144d8   DEVICE_NAND_PAGE_layout
00014520   DEVICE_NAND_ECC_info
00014540   DEVICE_NAND_BB_info
00014550   devString
00014800   gNandBoot
0001481c   gEntryPoint
00018000   STACKStart
02000000   EMIFSize
02000000   EMIFStart
02000000   __selfcopysrc
02000000   selfcopy
02000050   _dramstart
02000058   _selfcopysrc
0200005c   _selfcopydest
02000060   _selfcopysrcend
020000e0   FLASHTEXTStart
020043e0   FLASHDATAStart
02004540   __selfcopysrcend
10000000   DDRSize
80000000   DDRStart
80000000   EXTERNAL_RAM_START
90000000   EXTERNAL_RAM_END
ffffffff   __binit__
ffffffff   __c_args__
ffffffff   binit

[93 symbols]

0 Miguel A. Alanis over 15 years ago in reply to Gennadiy Kiryukhin

TI__Genius 9490 points

Gennadiy,

I've moved your post to our Linux forum so the proper audience is able to comment on your new SW specific questions.

regards,

miguel

0 Gennadiy Kiryukhin over 15 years ago in reply to Gennadiy Kiryukhin

Expert 2800 points

I just noticed something. The .text section is 11928 bytes long. However, .bin file that gets generated by hex470.exe is only 7875 bytes long. I think this might be part of the problem. Where are the other 4053 bytes?

...

Fifteen minutes later...

I found the problem! In the command line for hex470 I did not have the reference to bin2hex.cmd file. Once I put it there, recompiled everything, I got the board loading UBL from NAND. The UBL .bin file now is 20K in size.

Problem solved.

0 Miguel A. Alanis over 15 years ago in reply to Gennadiy Kiryukhin

TI__Genius 9490 points

Gennadiy,

This is good news, thanks for the patience.

regards,

miguel

Processors

Processors forum

DM355 not booting from NAND