AM3352: UART MDR1 register issue

Alberto Soattin

Part Number: AM3352

Hi Support,

my customer is working with AM3352 and having issues in using UART MDR1 register featuring on the fly modifications.

They are studying Advisory 1.0.35 of the Errata, so they know they can have corrupted data. Suggested workaround is not working for them, in fact they cannot clear TX or RX FIFOs.

How can they solve this, in order to have UART working at 100 kbaud properly?

Thanks and regards,

Alberto

over 7 years ago

0 Biser Gatchev-XID over 7 years ago

TI__Guru**** 393215 points

Alberto,

What software is this? Which version?

0 Alberto Soattin over 7 years ago in reply to Biser Gatchev-XID

TI__Genius 16905 points

Biser,

they are using Linux, different versions, depending on the end product.
Alberto

0 Bin Liu over 7 years ago in reply to Alberto Soattin

TI__Guru**** 178021 points

Alberto,

The Linux kernel UART driver 8250_omap.c has already implemented the workaround for Advisory 1.0.35. Has the customer done any additional modification to the UART driver?

How does the customer know the FIFO clearing issue is related to MDR1 register?

0 Bin Liu over 7 years ago in reply to Alberto Soattin

TI__Guru**** 178021 points

Alberto,

Do you have any update on my questions above?

0 Alberto Soattin over 7 years ago in reply to Bin Liu

TI__Genius 16905 points

Bin,

feedbacks will come during this week.
Thanks
Alberto

0 Bin Liu over 7 years ago in reply to Alberto Soattin

TI__Guru**** 178021 points

Hi Alberto,

I haven’t heard back from you, I’m assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). thanks.

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AM3352: UART MDR1 register issue