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HPI boot in new OMAP137

Hello everyone,

       I have a question need to be solved.   Nearly  I bought  an OMAP137BZKB3,   which is different  from the older OMAP137ZKB3.  Then my old program cann't run properly,  which is stuck in HPI boot part.  Is there any difference between the two versions that will influence the HPI  boot ? 

      Any help would be appreciated.  Thank you!

  • ps:   the program has  been downloaded in DSP  by host, and it already ran , but the host couldn't read DSP's data through HPI

  • Daisy,

    Can you check this other thread to see if your issue might be related: http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/p/59660/214894.aspx

    -Tommy

  • Tommy,

        It's not the same as the thread  you mentioned before.  DSP program  has been downloaded by host and it ran properly,  but after that the host couldn't  access DSP via HPI,  it seems like HPI has been disabled.  But using JTAG boot,  DSP and host  can communicate correctly through HPI.

    -Daisy

  • Daisy,

    Upon exit of the ROM-based boot loader, I think HPI is disabled.  The user boot application that is executing out of DSP should perform a complete HPI initialization on its own.

    -Tommy

  • Tommy,

         but I have already added HPI initialization in the boot program,   is there something wrong with my procedure as below?

        //  pin multiplexing setup

        PINMUX13 = 0x44111111;  // HPI / McASP1
        PINMUX14 = 0x22444444;  // HPI
        PINMUX15 = 0x41222222;  // HPI
        PINMUX16 = 0x11111114;  // HPI
        PINMUX17 = 0x00104111;  // HPI
        PINMUX18 = 0x22212221;  // HPI
        PINMUX19 = 0x00000002;  // HPI

        CFGCHIP1     &= 0xFFFEFFFF;                               //HPIBYTEAD=0
        CFGCHIP1     |= 0x00008000;                                // HPIENA=1
        HPI_HPIC = 0                                                              //HPI control register                                                  

                 |( 1 << 9 )                                                     //Dual HPIA mode operation is enabled.
                 |( 1 << 3 )                                                     //reserved bit.
                 |( 0 << 0 );                                                     //First halfword is most significant.

        HPI_PWREMU_MGMT = 0;  
       
    HPI_HPIAW =0x80000000;                           //initial addresses
        HPI_HPIAR =0x80000000;

        HPI_HPIC &=0xFFFFFF7F;                                  //HPIRST=0                       

  • daisy wu said:
        CFGCHIP1     &= 0xFFFEFFFF;                               //HPIBYTEAD=0

    Why do you set HPIBYTEAD=0 (word addressing)?  I believe for boot it uses byte addressing which is more natural since this device is byte-addressable.  Is your host shifting all addresses by 2 bits to compensate?  If not, your writes aren't going where you think.

  • Daisy

    To extend on what Tommy and Brad said, the ROM code in Rev 2.0 silicon tries to put back the CFGCHIP1 register values for HPI back to the power on reset values upon HPI boot rom function close. So it sets HPIBYTEAD and HPIENA back to 0. ROM code in Rev 1.0 does not do this, and leaves HPIBYTEAD and HPIENA as 1.

    Hopefully this difference , is what is causing a difference in behavior on your setup.

    Regards

    Mukul

  • Brad, 

           You're right. My problem is solved. Thanks a lot.

           Also thanks tommy,  you give me quite important information.