Part Number: AM3351
Hi Champs,
customer currently is using several kind of the AM335x CPUs, in every case they got problems with booting from the eMMC.
Because the limitation of TI is
26.1.7.5.2 System Interconnection
Each interface has booting restrictions on which type of memory it supports: -
• MMC0 supports booting from the MMC/SD card cage and also supports booting from
eMMC/eSD/managed NAND memory devices with less than 4GB capacity.
• MMC1 supports booting from eMMC/eSD/managed NAND memory device with 4GB capacity or
greater.
We comply with this and trying to handle it as good as possible.
- So in my case, and this is nearly the same what all other designs look like, i would like to boot from eMMC0.
MMC1 is not available cause of a multiplexed GPMC interface that I have to use.
- I have to use a 4GB eMMC (Toshiba at MMC0).
This configuration is per Datasheet not possible.
In all our designs the eMMC will be sized to the half and we are getting the Pseudo Single Level Cell. (More infos at Toshiba eMMC).
This is a non-reversible Prozess and will be generated while the first boot.
The question now is,
we are using the pSLC Mode of the eMMC, will the CPU be able to Boot from a pSLC eMMC which was a 4GB and now is a 2GB memory?
Or maybe it is possible to generate smaller boot partitions that will be accepted from the AM3351?
A workaround for our configuration could help us very much.
Because in some other designs before e.g. we use some switches to jump from eMMC1 back to GPMC or we use an additional NOR-Flash for the Bootloader.
This all is more or less a unpleasant solution.
