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TMS320C6678: SRIO NREAD error, doorbell complete code = 3

Part Number: TMS320C6678


Hi,

I have a problem when I use SRIO NREAD operation to read data from one C6678 to another.

1. It is the CIO log message:

LSU_transfer NREAD via LSU 0 from 0x10802200 to 0x1080a200, 32768 bytes, outPortID 2
NREAD from 0x10802200 to 0x1080a200, 32768 bytes, completion code = 3

2. I use SRIO debug GEL script "SRIO_LogTrans_Errors_scan" to read the debug information:

C66xx_8: GEL Output: *******************************************************************************************************
C66xx_8: GEL Output: ********************************** SRIO LOGICAL/TRANS LAYER ERROR SCAN RESULTS ************************
C66xx_8: GEL Output: *******************************************************************************************************

C66xx_8: GEL Output: Problem(IO_ERR_RSPNS): An LSU received an ERROR response to an I/O logical layer request (To clear this bit SW should write 0 to it)
C66xx_8: GEL Output: Reason & Solution: 1) DMA transfer error at RX SRIO node, receives an error rsp for NWRITE_R and NREAD
C66xx_8: GEL Output: request pkts.
C66xx_8: GEL Output: 2) Retry DOORBELL response received, or Atomic Test-and-swap was not allowed
C66xx_8: GEL Output: (semaphore in use).
C66xx_8: GEL Output: 3) Request payload lenght was in error for NWRITE_R pkts.

C66xx_8: GEL Output: Logical layer Error occurred in transaction from 0x00A0 ---> 0x00B0

C66xx_8: GEL Output: DETAILS OF THE ERRONEOUS PKT:

C66xx_8: GEL Output: PKT_TYPE ---> NREAD packet
C66xx_8: GEL Output: DIO_XAMSBS ---> 0x00
C66xx_8: GEL Output: DIO_ADDRESS_MSB ---> 0x00000000
C66xx_8: GEL Output: DIO_ADDRESS_LSB ---> 0x10802200
C66xx_8: GEL Output: IMP_SPECIFIC---> 0x0000
C66xx_8: GEL Output: For Multi-segmented msgs:
MSGINFO ---> Letter-0, Mbox-0, SegmentId-0
C66xx_8: GEL Output: For Single-segmented msgs:
MSGINFO ---> Letter-0, Mbox-0

3. I find this issue can be fix if I use CCS memory browser to fill some data into the memory area which read by SRIO before I execute the NREAD operation.

Regards,

Snaku

  • Hi,

    Just wanted to let you know that I am looking into this.

    Best Regards,
    Yordan
  • Do you use processor SDK RTOS (which version) or is this a bare metal application?

    From SRIO user guide:
    0b011 — Transaction complete, Non-posted response packet (type 8 and 13) contained ERROR status, or response payload length was in error

    However the output from your srio debug gel script suggests completion code 6:
    0b110 — “Retry” DOORBELL response received, or Atomic Test-and-swap was not allowed (semaphore in use)
    which suggests problems with a bit that is already set and has not been cleared, see this thread:
    e2e.ti.com/.../726346

    Best Regards,
    Yordan
  • Hi Yordan,

    1.No, I am not use Processor SDK, it is a bare metal application, which modify by STK SRIO example code. I test NWRITE and NWRITE_R operations are work properly, but NREAD is fail.

    2.my SRIO debug message shows the complete code is 3, not 6.

    "LSU_transfer NREAD via LSU 0 from 0x10802200 to 0x1080a200, 32768 bytes, outPortID 2

    NREAD from 0x10802200 to 0x1080a200, 32768 bytes, completion code = 3"

    3.the thread you metioned is my previous post, that complete code is 6, and the issue is the doorbell interrupt routes to wrong DSP core.

    4.Now my issue is NREAD with completion code 3, i use SRIO debug gel to read the LSU0 status, it indicates the completion code is 3:

    "C66xx_8: GEL Output: *********** LSU0 SHADOW REGISTERS STATUS: ***********

    C66xx_8: GEL Output: LCB => This transaction is the current one having LTID: 0 
    C66xx_8: GEL Output: CC => Transaction complete, Non-posted response packet (type 8 and 13) contained ERROR status, or response payload length was in error"

    5. I use the SRIO debug GEL to scan the destination DSP, it shows the destination address is invalid. Should I setup accessible memory address table in RX side MAU?


    C66xx_24: GEL Output: *******************************************************************************************************
    C66xx_24: GEL Output: ********************************** SRIO LOGICAL/TRANS LAYER ERROR SCAN RESULTS ************************
    C66xx_24: GEL Output: *******************************************************************************************************

    C66xx_24: GEL Output: Problem(RX_IO_DMA_ACCESS): A DMA access to the MAU was blocked (To clear this bit SW should write 0 to it)
    C66xx_24: GEL Output: Reason & Solution: The Direct IO pkt request received by the RX side MAU, contained an invalid destination
    C66xx_24: GEL Output: address which is not accessible in the device memory map.

    Regards,

    Snaku

  • Hi Yordan,

    I think I got the same issue with this thread, 'C6678 SRIO DMA Access Error'.

    This issue occurs after DSP reset, but it can be clear after I write some data to the memory space which read by NREAD transaction.

    [ My CIO log ]

    LSU_transfer NREAD via LSU 0 from 0x10800200 to 0x1080a200, 8 bytes, outPortID 2
    [C66xx_25] received doorbell which indicates NREAD operation done.
    [C66xx_8] NREAD from 0x10800200 to 0x1080a200, 8 bytes, completion code = 0
    LSU_transfer NREAD via LSU 1 from 0x10800210 to 0x80000000, 8 bytes, outPortID 2
    [C66xx_25] received doorbell which indicates NREAD operation done.
    [C66xx_8] NREAD from 0x10800210 to 0x80000000, 8 bytes, completion code = 0
    LSU_transfer NREAD via LSU 2 from 0x10800220 to 0x81000000, 8 bytes, outPortID 2
    [C66xx_25] received doorbell which indicates NREAD operation done.
    [C66xx_8] NREAD from 0x10800220 to 0x81000000, 8 bytes, completion code = 0
    LSU_transfer NREAD via LSU 3 from 0x10800230 to 0x82000000, 8 bytes, outPortID 2
    NREAD from 0x10800230 to 0x82000000, 8 bytes, completion code = 3
    LSU_transfer NREAD via LSU 4 from 0x10800240 to 0x83000000, 8 bytes, outPortID 2
    NREAD from 0x10800240 to 0x83000000, 8 bytes, completion code = 3
    LSU_transfer NREAD via LSU 5 from 0x10800250 to 0x84000000, 8 bytes, outPortID 2
    [C66xx_25] received doorbell which indicates NREAD operation done.
    [C66xx_8] NREAD from 0x10800250 to 0x84000000, 8 bytes, completion code = 0
    LSU_transfer NREAD via LSU 6 from 0x10800260 to 0x85000000, 8 bytes, outPortID 2
    [C66xx_25] received doorbell which indicates NREAD operation done.
    [C66xx_8] NREAD from 0x10800260 to 0x85000000, 8 bytes, completion code = 0
    LSU_transfer NREAD via LSU 7 from 0x10800270 to 0x86000000, 8 bytes, outPortID 2
    [C66xx_25] received doorbell which indicates NREAD operation done.
    [C66xx_8] NREAD from 0x10800270 to 0x86000000, 8 bytes, completion code = 0
    SRIO test complete.

    Regards,

    Snaku

  • Hi Snaku,

    I will need some time to look at this. I will get back with any feedback I have.

    Best Regards,
    Yordan
  • Hi Snaku,

    >>NREAD from 0x10800230 to 0x82000000, 8 bytes, completion code = 3

    Do you configure the L2 memory as all SRAM or part as cache? If you read data from DDR using NREAD, do you have the same issue?

    >>it can be clear after I write some data to the memory space
    Do you mean you have to initialize the memory before NREAD operation? How does your code look like with regard to write data and NREAD sequence?

    Regards,
    Garrett