RTOS/AM3359: SPI boot fails on custom board

The RTOS team have been notified. They will respond here.

Can you please clarify that you are referring to ROM bootloader as PBL? Are you saying that the ROM bootloader is unable to read the secondary bootloader from flash ?

Can you please specify how the SYSBOOT pins are configured on your board and what is the boot order? Can you put a scope on the SPI clock and SPI CS and see if the clock is available and the CS goes low and read message goes to the SPI flash? Can you confirm read write to the SPI flash works correctly when you used the SPI writer and there were no issues reported during programming?

Regards,
Rahul

Hi Rahul,

it seems that my post has been cut.

I'll attach again the file generated by am335x-boot.dss script.

As you can see lookinf at that file:

Boot Sequence : USB0 -> NAND -> SPI0 -> MMC0.

The PC (program counter) is  = 0x0002008c that is ROM Data exception default handler.

With PBL I mean ROM bootloader (i.e. Primary boot loader).  When I've used SPI writer to store in SPI NOR flash the SBL I've checked out that the procedure succeded (flash writer printed out on the CCS console "Verifying... Success."

I can repeat the procedure.

Meanwhile can you check the attached file and give me your opinion ?

Thank you.

Regrads,

Pierfrancesco

./cfs-file/__key/communityserver-discussions-components-files/791/am335x_2D00_boot_2D00_analysis_5F00_2018_2D00_09_2D00_24_5F00_100643.txt

Hi Raul,

I've ran again the Flash writer SW to write the SBL onflash, and I'me attaching the CCS console output.

The result swtiching off and on again the board is the same (I'm attaching a new log file from CCS script).

Regards,

Pierfrancesco

/cfs-file/__key/communityserver-discussions-components-files/791/spi_5F00_flash_5F00_writer_5F00_sbl_5F00_load.log

/cfs-file/__key/communityserver-discussions-components-files/791/am335x_2D00_boot_2D00_analysis_5F00_2018_2D00_09_2D00_26_5F00_163233.txt

Here are some debugging tips:
-On the ICE board that is working, use Code Composer to determine where in the internal memory the SBL is getting loaded. Try setting a breakpoint at the first line of executed code (ie, the point where the code jumps from the ROM to the internal memory), and the perform a Run->Reset->System Reset. This should hit the breakpoint. Here, you will be able to see the first few instructions of the PBL.
-Now perform the same on your custom board. After hitting the breakpoint, does the PBL code look the same? Can you step from there, or do you hit the exception? This will determine if your PBL is getting correctly loaded to the internal memory.
-If all is good, then you should be able to step through the PBL to see if it causes an exception, or if the next failure point is when the code jumps from the internal memory to DDR

REgards,
James

Hi James,

thank you for your tips. I found out the reason of issue on our custom board.

The root cause is that  SBL (secondary boot loader) provided by TI in the PDK cannot be used as it is in a custom board, since it expectes to recognize, via EEPROM, one of the TI evaluation board. So, since we've mounted the same EEPROM of ICEv2 board, to let the SBL to work properly I've to write to my EEPROM the same info of ICEv2 EEPROM.

I think this should solve my problem.

Regards,

Pierfrancesco