TMS320C5545: Minimum power consumption (sleep mode) and wake up time

Hi Charles,

The C5545 IDLE power and wake times will closely match the C5505, C5515, C5535 numbers. C5517 power numbers will be slightly higher, but similar procedure. There are some E2E threads for these devices with the numbers published, and they will closely match the power estimation spread sheet.

Relevant E2E links:
e2e.ti.com/.../539484

e2e.ti.com/.../2610596

e2e.ti.com/.../558742

The Chip Support Library includes examples to put the device into IDLE2, IDLE3, and RTC-only modes: http://www.ti.com/tool/sprc133
See c55_csl_3.08\ccs_v6.x_examples\power

And there is this wiki again: processors.wiki.ti.com/.../35_Power_Consumption_Summary

And this C5000 DSP-Based Low-Power System Design appnote: www.ti.com/.../getliterature.tsp

1)
Min power - use the power estimation spreadsheet. IDLE3 and RTC-only is in there. If you use the macro buttons, the configuration for at IDLE3 and RTC-only will be auto-filled. To get the IDLE2 number, change the PLL to Active and set the frequency to a range between 60MHz and 150MHz (it will increase the Core power by upto 1.636mA (1.3V CVDD assumed)


2)
I could not find exact timing measurements to exit from IDLE2 and IDLE3.
It should be very fast to exit IDLE2 - I think a few milliseconds at most. The interrupt pin wakes the device from IDLE, then runs the ISR code and jumps back to running the application. The clock never stops in IDLE2, so the program just resumes.
The time required to exit IDLE3 is IDLE2 + ~4ms for the PLL to be configured and re-lock.
RTC-only mode is the lowest power controlled sleep mode, but to wake from RTC-only mode requires booting from external memory again.

Will the DSP wake up fast enough

3)

Both RTC-only idle mode and a powered-off device must boot from external memory before running application code.

Refer to this appnote for specifics: Using the TMS320C5545/35/34/33/32 Bootloader (Rev. D) - www.ti.com/.../sprabl7

The C5545 bootloader sequentially checks these peripherals for a valid boot image, and boots the first valid boot image that it finds...
16-bit SPI EEPROM, 24-bit SPI serial flash, I2C EEPROM, and
SD/SDHC/eMMC/moviNAND, then UART and USB (endlessly retrying from the last two).

So depending on the boot mode, it might take several hundred milliseconds.

There are little tricks you can use to speed up the bootloader execution. One method is to have a small boot image in the first boot source (SPI EEPROM or SPI flash). This boot image contains a secondary bootloader that can copy the boot image from the same or another peripheral with much faster throughput.
Another trick is to use the reg_config parameters when creating a boot image to modify the registers written to by the bootloader (before the program code is copied across) to speed up the peripheral clock, thereby booting faster.
Using external regulators instead of the internal LDOs will also speed up the power ramp time from 15-50 ms to a few microseconds.

Is there a possibility to start fast enough? Probably not with the off-the shelf C5545 device unless the first several milliseconds of the utterance can be ignored, and there is still enogh keyword/trigger phrase to detect, without too many false positives.

You might try reaching out to a TI representative about a C5545 device with a modified ROM code that supports booting from SPI in < 100ms (typical, depending on boot image). This would offer the lowest power (off) and fastest boot, which would catch most of the trigger phrase (except for the first ~100ms).

Hope this helps (and sorry for the delay),
Mark