Programmable part of VICP (DM6446)

Amit,

Due to its complexity, at this moment, the VICP is closed and only exercisable thru codecs available from TI and our ASPs; however, we are looking into providing a library with defined API so our customers can take advantage of the extra processing power of VICP for their own DSP algorithms.

I am curious what documentation shows memory inside the VICP? As Juan mentions the peripheral is not supported, so even if there memory inside the VICP module it is not going to be user accessable.

Juan,

By when would TI provide this library to VICP? Also, will it be available for old customers or only to the new customers who would be buying boards with VICP.

Bernie,

Actually I read http://focus.ti.com/lit/ml/sprs324a/sprs324a.pdf, where 69KB of VICP memory was used by the H.264 decoder, I also got the starting address of the VICP memory from one of the memory map document, so I was wondering whether it was accessible directly.

Based on the fact that this memory is not outlined in the DM6446 datasheet I would be weary of using it, generally if it is not discussed in the datasheet it is considered to not exist and/or not be supported, so if you do try using these you will likely be on your own.

The datasheet actually shows two addresses for the VICP one being 0x01CC00000 (configuration bus, ARM/EDMA and C64x+) and the other being 0x00100000 (C64x+), based on how this is shown it may make sense to try to access 0x00100000 if you are running an algorithm on the DSP, but it may not be worth while tyring to use it from the ARM at 0x01CC00000 as you would be using the configuration bus. If you do intend to use it I would suggest to do some thorough testing to make sure that you do not run into any issues accessing any memory properly, also note that not all memory in there may be contiguous, and I do not know if there are any other caveats to trying to use it.

The codec datasheet also mentions a linker command file that should point to the locations it uses which are likely safe, at least for C64x+ application code which the codec claims to use, though I have not been able to find this linker command file myself yet.

I also would not recommend trying to use this memory; this is unsupported.  Aside from the things Bernie mentioned, you need to take system design issues into consideration.  For example, are you going to operate under codec engine framework (e.g. not take resources such as memory other dsp algorithms may be using directly); what other algorithms are you going to be running....

With regards to VICP library, this will be available to all (new and old EVM users).  It will be a software library similar to IMGLIB or DSPLIB to help users use the additional processing power of VICP without having to learn its complexities.  Unfortunately, I cannot provide a timeline yet, but I will see if I can find out more information on this.

Thank you for all the information, it helps!

This is a bit off-topic, but a library to use the VICP is at http://focus.ti.com/docs/toolsw/folders/print/sprc831.html.

Hi,

I am developing an application on DM6446 EVM board with ARM9, DSP, VICP and some peripherals
I got a problem and don't find any solution for that, would you mind help me to solve that?
Before please note my design details:

    1 - The ARM is master and control other parts of system
    2 - The boot process is executed from NAND (BTSEL == 00), So after power on, the RBL (ROM Boat Loader) copies
        second level boot loader from NAND to ARM IRAM and then my application is loaded to DDR
    3 - Based on "spraai4.pdf" and "sprue14c.pdf" documents, I used the ubl to load my own application to DDR
        (it is noted that my application does not use any linux so I dont use uboot, I developed specific application)
    4 - Binary file of my ARM application from .out was generated with tms470.exe in CCS v3.3
    5 - Settings for NAND is J4=NAND, S3[1..4] = 0000 (NAND boot, 8-bit AEMIF, ARM boots DSP)
    6 - In my application, first some peripherals of systems (PINMUX, UART, I2C, VPSS) are configured, then DSP and
        VICP codes are copied to DDR, then DSPBOOTADDR is programed and finally the ARM releases C64x+ DSP from reset,
    7 - The DSP&VICP codes are included in ARM binary file as a header
    8 - To program NAND flash I use flash_burn_utility based on following web site
        (http://wiki.davincidsp.com/index.php?title=Serial_Boot_and_Flash_Loading_Utility)
    9 - The value of PSC_MDSTAT_IMCOP register (0x01C418A0)is 0x1E03 and the value of PSC_MDCTL_IMCOP register (0x01C41AA0) is 0x0003
        (I tested them with 0x1F03 and 0x0103 respectively but there is no difference)

All parts of my design works correctly except VICP (actually IMX does not generate interrupt for completion of procedure). for example, I checked above procedure with simple DSP example ("blinding a LED") and the DSP boots and works correctly

Also I checked program with JTAG Emulator when DSP_BT == 1 (J4=NAND, S3[1..4] = 0001), and VICP works correctly in this condition,
Under this circumstances, I flashed NAND but ARM does not boot when DSP_BT == 1(J4=NAND, S3[1..4] = 0001),

I dont really know why VICP does not work when DSP_BT == 0, is it need to initialze EDMA, INTC, MCBSP, ...?
Does EDMA3LLD configuration after system power on conflicts with VICP?
(I dont initialze and configure EDMA3 in ARM application because I think the DSP program initializes it automatically before using VICP in CPIS_Init method)