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TMS320C6678: Hyperlink status register read time out

LI XIANG
Intellectual 445 points

Part Number: TMS320C6678

Hi,

I observed a case in C6678 DSP Hyperlink that my Host SW(PC SW) read C6678 Hyperlink status time out.

The background as below:

I have a custom board with 2 DSP(C6678) and with Hyperlink to connect each other.

My DSP core(0) will periodically(4K to 16KHz) trig DMA write data to other side through Hyperlink and before every time Trig DMA write, DSP core(0) will check the Hyperlink status(0x21400058) and ECC counter(0x2140004C).

At the same time, my PC Host SW will also check the DSP Hypelrink status through SRIO. It's found that when PC Host SW read hyperlink status(0x21400058), the SRIO will report read timeout error.It's also checked that the SRIO read DDR3 address normally.

So I am wondering, Can the Hyperlink status register support multi-host read at the same time?(if so, any document states that?) Any other possible that cause the SRIO read Hypelrink status timeout?

Thanks.

  • 0
    TI__Guru**** 161600 points
    Hi,

    One thing to clarify:
    At the same time, my PC Host SW will also check the DSP Hypelrink status through SRIO.

    You mean that your board is connected to a host PC via SRIO, right? And you use the SRIO interface to initiate read of the Hyperlink status register?

    To answer your questions:
    So I am wondering, Can the Hyperlink status register support multi-host read at the same time?(if so, any document states that?)

    I don't think this is possible. HyperLink provides a high-speed, low-late ncy, and low-pin-count communication interface that extends the internal CBA 3.x-based transactions between TWO KeyStone devices.
    If you wish to transfer the hyperlink status register value to your host pc, you can write it in a temporary buffer and read this memory through SRIO interface. This way you avoid the direct SRIO read of Hyperlink status register and the possible problems coming out of this.

    Best Regards,
    Yordan