DM365 booting issue.

Sangamesh,

based on the silicon errata http://www.ti.com/litv/pdf/sprz294d, if you have revision 1.1 silicon, the UART RBL boot mode had some issues, this is fixed on revision 1.2.

can you confirm what version of the silicon you have?

regards,

miguel

Hi Miguel,

am using DM365 1.2 version.;(

Sangamesh,

can you confirm that the Terminal settings are correct as outlined in http://processors.wiki.ti.com/index.php/GSG:_DM365_DVEVM_Hardware_Setup.

"2) Run a terminal session (such as Minicom on Linux or HyperTerminal on Windows) on the workstation and configure it to connect to that serial port with the following characteristics:

• Bits per Second: 115200
• Data Bits: 8
• Parity: None
• Stop Bits: 1
• Flow Control: None "

regards,

miguel

miguel,

I set all the configuration set up as for the data sheet of dm 365 that is same as what you stated ,but it was not giving me the "boot me" signal rather its giving the some garbage  values  like delta  values of 8 bits , don't know  why?. we have checked all the possible things needs to test , but we are expearncing the compatibility with ddr2  memory, the code  what we has is IPNC reference once (Dm365 which has  DDR2 - K4T1G164QE-HEC6) but now i changed the DDR2 to samsung K4T1G164QF (the difference is only the DIE compare to the referenced one(QE) )is there any register setup(modifying the register values)  i need to set for the compatibility with the newer DDR2(QE Die),  could you  just figure it out and if so send me the required value need to set on the DDR2 register...

Sangamesh,

You need to find out if your different DDR memory chips have differences in terms of their timings etc and then setup the appropriate DDR configuration registers accordingly.  You can learn how to do this in the DDR users guide (http://focus.ti.com/lit/ug/sprufi2/sprufi2.pdf) I am not going to do this for you.

What makes you think that you have DDR issues? did the same board design worked with the previous DDR chip?

The symptom you described is exactly what pg 1.1 silicon behaves like when used.  How did you find out that you have rev 1.2?

regards,

miguel

Sangamesh,

Here are some additional ideas to help you on your debug.

a.   Verify DDR is working using Code Composer Studio (some evm code can be found at: http://support.spectrumdigital.com/boards/evmdm365/revf/files/EVMDM365_BSL_revf.zip) directory structure after you install the testsuite should be something like C:\CCStudio_v3.3\boards\evmdm365_v1\tests\ddr)

b.   Verify UART is working using CCS (There is also some UART testcode and you can try to modify for UART loopback and externally connect the RS232 TX->RX pins.

regards,

miguel

miguel,

ya, am trying interface the DDR2 using CCS only through JTAG its connecting, when i am writing into external memory its not retaining the data(but its retaining the data in  internal RAM memory location),right now am trying to burn the code in external memory and then it will boot from  flash,so i thought there is a miss match in the DDR memory ........ am cross verifying with the GEL file(IPNC CODE)  and i'll let you know if i get any thing out of it... mean while could you  search  the tech  solution for me..?

miguel,

Hey,

I came to know that the speed of both DDR's are same, Mean while  what could the difference may be could you figure it out pls....?

Sangamesh,

Is this your custom board or Spectrum digital EVM or INPC(APPRO)?

If custom board, did you follow the DDR layout and routing guidelines specified in the dm365 datasheet?

Which device speed grade did you buy, 300MHz, 270mhz, 216mhz?

The Gel file provided in the EVM website should be good for the DDR chip that is on the EVM with respect to its DDR timings. 

I'm going to attach a gel file that has the DDR timings relaxed to the max to see if you are able to retain data in your DDR, its just a debug point but can help isolate if you have a DDR timing configuration issue, give it a try and let us know if you are able to run the EVM ddr test, also, in the ddr testcase there is a built in function that allows you to test the full range of the DDR space available on the EVM DDR chip, you can simply modify the main.c file to call the ddr_test_full, here's an example.

"//    TEST_execute( ddr_test, "DDR", 1 ); //used to read/write only to a certain area in the DDR space
  TEST_execute( ddr_test_full, "DDR", 1 ); //used to read/write the whole DDR space."

regards,

miguel

miguel,

I am happy to inform you that , the custom board is working;;:), but now i burned the soft through the serial port,  because its giving the problem with IP connection(RJ-45)connection..:), could you tell me the what are the main thing need to check in that connection, where i used 2 LED one for POWER nd  other to LAN, but when i connect the RJ-45 its not glowing rather its blinks once and goes off , its happening when i  do POR (power on reset), could you go through nd help me....

Sangamesh,

Its good to hear that the previous issues are resolved.

Some suggestions for the ENET debug are:

1) Double check your hardware connections you can compare to spectrum Digital's EVM EMAC->MDIO->RJ45 connections (http://support.spectrumdigital.com/boards/evmdm365/revf/files/EVMDM365_revf_Schematics.pdf)

2) You can also build a Ethernet connector with the TX/RX data loopback and run the spectrum digital emac_loopback test (located on test directory that i communicated earlier in the forum thread) to get an idea on how the ENET is communicating properly by looping back data all the way to the connector.

If you are running this and seeing this ENET issues after linux has properly booted, then you want to ensure that you are setting the ipaddr and serverip specific bootargs properly, you can see examples of this on the external wikis http://processors.wiki.ti.com/index.php/GSG:_DM365_DVEVM_Additional_Procedures#Restoring_the_NAND_Flash)

regards,

miguel

hi miguel,

The loop back thing is not working, but  in PHY the THE LINK STATUS PIN  showing its connected , don't whats happening need to debug, could suggest something?