EDMA3 resource management and DMAN3

Let's take a particular example : the dm648 demo project.
In this project, the dman3 module is configured with the following lines :

var DMAN3 = xdc.useModule('ti.sdo.fc.dman3.DMAN3');
DMAN3.heapInternal       = "DDR2";
DMAN3.heapExternal       = "DDR2";
DMAN3.paRamBaseIndex     = 256;
DMAN3.numTccGroup[0]      = 6;
DMAN3.tccAllocationMaskL = 0x0000003f;
DMAN3.tccAllocationMaskH = 0x00000000;
DMAN3.numQdmaChannels    = 6;
DMAN3.qdmaPaRamBase       = 0x02A04000; 
DMAN3.qdmaChannels          = [0,1,2,3,4,5];
DMAN3.numPaRamEntries      = 48;
DMAN3.numPaRamGroup[0]      = 48;

I guess this value is the result of some process where the tcc resources are divided
between the edma low level driver and the dman3. What would happen if I were to change the previous lines with the following :

DMAN3.tccAllocationMaskL = 0xffffffff;
DMAN3.tccAllocationMaskH = 0x00000000;

I experimented this with my project, and it resulted in the algorithm using dman3 being very very slow.
So I guess there is some tcc conflict happenning. Unfortunately, the demo settings does not provide enough resources for my (vendor provided)
algoritm to work. I would like to know how I can safely configure dman3, knowing the different driver I will be using. I sucessfully used the following settings :

DMAN3.tccAllocationMaskL = 0x0000003f;
DMAN3.tccAllocationMaskH = 0x0f000000;

But I am about to use two more video port, and I wanna be sure it won't generate conflict

PS : I would also like to know how in this forum to generate <br> tags instead of <p> tags when I hit return.

There may have been some conflict with the setting you used at first, since this is a bit mask for the TCC allocation you were saying that all of the first 32 TCCs were to belong to the DMAN3. Unfortunately I do not do much DM648 work so I do not have the software installed but you can probably find the video driver documentation and through that what TCCs are being used.

As to your forum formatting question, try using SHIFT+ENTER to put in single line breaks.
If you do you should be able to break like this.

This means I have to look at each and every driver to see what could be the resource used ?
This negates the benefit of using package and xdc tooling.
There is no way to configure the edma3 driver or app to allocate some tcc to be used by the edma3 resource manager,
and some other by the dman3 ?

My understanding of DMAN3 was that it is only used for QDMA channels, i.e. memory to memory copies rather than the peripheral-driven EDMA channels.  So you wouldn't want to give it all the TCCs because there are not even that many QDMA channels.  There is another software component called the EDMA low level driver which could (should!) be used for doing all the EDMA resource management.  I'm not sure if it was out when the DM648 software was written.

In more current software releases of the Framework Components, I believe starting with FC 2.00, the DMAN3 uses the resource manager from EDMA low level driver.  In that way there is only ONE resource manager for EDMA/QDMA in the system.

I realize this doesn't answer your question very well, though I'm hoping it might spur further discussion that does!

Brad

I am only an algorithm "consumer", but I guess that with proper chaining, an algorithm could use
more TCC than there is QDMA channels. And you can do memory to memory dma using "standard" EDMA3
channel.

Anyway, in the sources for the dm648 edma3 lld, I found the following :
(from ti/sdo/edma3/rm/sample/src/bios_edma3_rm_sample_dm648_cfg.c)

            /* Resources owned by Region 1 */
            /* ownPaRAMSets */
            {0xFFFFFFC0u, 0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFu,
            0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFu,
            0x0u, 0x0u, 0x0u, 0x0u,
            0x0u, 0x0u, 0x0u, 0x0u},

            /* ownDmaChannels */
            {0xFFFFFFC0u, 0xFFFFFFFFu},

            /* ownQdmaChannels */
            {0x00000080u},

            /* ownTccs */
            {0xFFFFFFC0u, 0xFFFFFFFFu},

I guess the dman3 parameters from the dm648 demo are related to this :

paRam entries starting at 256, and dman3 owned tcc using the following parameter
DMAN3.tccAllocationMaskL = 0x0000003f;
DMAN3.tccAllocationMaskH = 0x00000000;

This allocation is not enough for the algorithm I am using, so I added :

DMAN3.tccAllocationMaskH = 0x0f000000;

I made this choice based on the following lines from ti/sdo/edma3/rm/sample/src/bios_edma3_rm_sample_dm648_cfg.c :

/**
 * \brief Mapping of DMA channels 32-63 to Hardware Events from
 * various peripherals, which use EDMA for data transfer.
 * All channels need not be mapped, some can be free also.
 * 1: Mapped
 * 0: Not mapped
 *
 * This mapping will be used to allocate DMA channels when user passes
 * EDMA3_RM_DMA_CHANNEL_ANY as dma channel id (for eg to do memory-to-memory
 * copy). The same mapping is used to allocate the TCC when user passes
 * EDMA3_RM_TCC_ANY as tcc id (for eg to do memory-to-memory copy).
 *
 * To allocate more DMA channels or TCCs, one has to modify the event mapping.
 */
#define EDMA3_DMA_CHANNEL_TO_EVENT_MAPPING_1          0x803FFFFFu

My understanding of this comment is that channels that are not mapped here won't be used by drivers, but are still under control of the edma3 resource manager.
If I am not using the EDMA3 to make some transfer of my own, then these TCC should be free, and overlaping dman3 and edma3 resource manager should not
lead to catastrophic failure.