I'm looking at the SYS_nRESWARM signal on the AM3505, and I'm a little confused on three things. First, the functionality of the signal: To me, it looks like the docs are saying that this is a bidirectional pin that, when configured for SYS_nRESWARM functionality (as it is on power-up) and pulled low, causes the CPU to reset. On the other hand, if I'm understanding the documentation correctly, it also becomes an output and drives low when the nRESPWRON signal to the CPU is driven low, or it can be driven low manually under software control. So, my questions on the functionality of the signal are: 1: How is the signal driven low in software? Can the GPIO1.OE and GPIO1.DATAOUT registers just be set to output a zero, or does the PADCONF register for that pin need to be set for mode 5, switching its functionality to GPIO first? 2: If, in software, SYS_nRESWARM is driven low to cause attached peripherals to reset, will the CPU reset also, or is the PRCM smart enough to know that the CPU is asserting the signal on purpose, so it can be safely ignored? Next, on the need for a pullup/pulldown: On the LogicPD SoM schematic, there's a "do not stuff" pullup resistor connected to the SYS_nRESWARM signal (which also goes to a buffer, which then leads to various peripherals whose reset is desired if the CPU should get a hard reset signal from the PMIC), but there's also not one, but two notes on separate pages saying "open collector only, no pullup". Thing is, in the tech ref manual for the AM35xx, on page 195 (among others), that signal is shown being pulled up with an external resistor. So, the question on this is: Is there really a need for a pullup, or is the internal pullup in the CPU sufficient? Finally, on the preferred mechanism for implementing a reset button: On the LogicPD design, there doesn't seem to be any device or switch that's capable of pulling nRESWARM low. Instead, on the thing that they call the "experimenter board" (which is the board to which the AM3517 SoM connects), there's a reset button which pulls a signal that they call "MSTR_nRST" low, and that signal, in turn, goes up to the SoM and pulls the \HOT_RESET pin on the PMIC low, which then causes the PMIC to pull its \RESPWRON signal low. The PMIC's \RESPWRON signal is connected to the SYS_nRESPWRON signal on the CPU, so this causes the CPU to reset. However, in the AM35xx technical manual, again on page 195, you show a button connected to SYS_nRESWARM, but not to the SYS_nRESPWRON signal. This leads us to the question: Is there a preferred mechanism for resetting the CPU? If so, can you explain the reasoning that leads to the preference?
