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TMS320C6748: Issue programming external NOR flash with sfh_OMAP-L138.exe

Part Number: TMS320C6748
Other Parts Discussed in Thread: OMAP-L138

Hi E2E Forum,

 

I have a customer that is currently using a TMS320C6748 and have been using this part for a number of years with the Micron M29DW323DB.  The Micron part has gone obsolete, and a compatible drop-in replacement part appears to be the Microchip SST39VF3201C.

However, when using sfh_OMAP-L138.exe to boot-load their image onthe Microchip flash, the boot-loader starts fine, can erase the flash, but when writing the NOR flash it fails.

                Target: Erased through 0x603A0000

                Target: Erase Completed

                Target: Timout occurred.

                Target: Normal write failed.

                Target: NOR Write Failed…Aborting!

                Tarhet:       ERROR:Writing NOR failed.

                Target:       Fail

                Target:       Fail

 

Has anyone had this issue before and resolved it?  Why is the boot-loader timing out and what Is it waiting for?

Thanks,

Mike

  • Hello Mike,

    We're looking into this. We should have an update for you either later today or on Monday.
  • Michael.

    Please clarify is the part drop in replacement because it is pin compatible or also because it supports the same read/write commands and flash organisation internally? At the minimum it looks like the vendor ID/manufacturer would change from software compatability.

    SFH utility has SPI flash srivers integrated that expect the read/write commands to match to be compatible. HAve you checked that ?
    processors.wiki.ti.com/.../Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138

    Regards,
    Rahul
  • Hi Rahul,

    The replacement part is exactly pin compatible with both devices having JEDEC standard pinouts for x16 memories. The command structure is the same for read/write commands. There doesn't appear to be any difference in the commands we should be using.   

    What does the OMAP-L138 wait for after a write before it times out? 

    What specific commands should we be looking at or checking for?

    Thanks,

    Andrew

  • Andrew,

    Please indicate the full command line option that you used to write to the NOR flash so we can provide more guidance. Other than NOR flash, was there any change in DDR settings. Can you confirm that you are able to read and write from the NOR flash using the CCS Project based approach
    OMAP-L138_FlashAndBootUtils_2_40\OMAP-L138\CCS

    Note: You will need to use older compiler version TI CGT 7.4.x as the utility doesn`t support ELF binary builds supported in TI CGT 8.x.

    The SFH and SFT tool is provided in complete source for customers to check the loading process. All of the errors related to timeout and write failure are coming from the nor.c driver file that is located in OMAP-L138_FlashAndBootUtils_2_40\Common\drivers\src

    Other than the flash is there any other component that changed in the design? Is the NOR flash connected to the same chip select.

    Regards,
    Rahul
  • Hi Rahul,

    The command line we use to bootload the NOR Flash is

    sfh_OMAP-L138.exe -flash_noubl -targetType C6748 -flashType NOR -p COM6 -v sdr_rfuboot_1.02b11.ais

    We were able to use the bootloader to boot the SST39VF3201B  (B-variant), but we cannot use the bootloader on the SST39VF3201C (C-variant).

    We want to be able to use this C varient though as it has some extra pin functionality that we require.

    Both parts are Bottom Boot. However they have different block sizes. 

    The B variant (working) has Uniform 32 KWord blocks

    The C variant (not working) has – Flexible block architecture – Eight 4-KWord blocks, 63 32-KWord blocks

    Could this be a cause of our issue, having these 4kword blocks?

    Thanks,

    Andrew

  • Also, there are no changes to the Ram configuration.
  • Hi There,

    I have attached both data sheets for the working and the non-working part. 

    When Programming the device, the B variant (working) doesn't appear to care what is on the write enable line. The C variant appears to want this line held low. 

    Could this be a reason why the B variant works and the C variant does not?

    Thanks,

    Andrew

  • Andrew,

    This can potentially be an issue but we cannot confirm this. It would be ideally to check this with the NAND vendor to confirm that this can potentially cause an write failure as you are observing. Also, before getting the sfh writer over UART working, we would recommend that you use the CCS project based Nand writer that we provide in the package for easier debugging option and then port those changes to the sfh code base.

    Regards
    Rahul