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RTOS/AM5728: Accessing a common known location on OCMC_RAM3 from DSP1 and DSP2

Shaunak Shilimkan
Intellectual 610 points
Part Number: AM5728

Tool/software: TI-RTOS

Hi,

I am running TI RTOS and a resource table on each of the DSPs. I want to be able to access a given memory location on OCMC_RAM3 from both DSP1 and DSP2.

I created a new section using 

Program.sectMap[".dsp1_dsp2_shared"] = new Program.SectionSpec();
Program.sectMap[".dsp1_dsp2_shared"].loadAddress = 0x405F0000;

then placed a variable in that section in both DSP firmware codes using

#pragma SET_DATA_SECTION(".dsp1_dsp2_shared")
volatile uint32_t InitDone = 0;
#pragma SET_DATA_SECTION()

For some reason the data I set on DSP1 is not reflecting when I try and read the same memory location on DSP2.

Is there a way to do this?

Regards,

Shaunak

  • 0
    TI__Mastermind 27355 points

    Hi Shaunak,

    This might be a cache coherency issue. Have you tried disabling the cache for the region?

    You can disable cache for a given region by adding the following to the .cfg file:

    var Cache = xdc.useModule('ti.sysbios.family.c66.Cache');
Cache.setMarMeta(base address, length, Cache.Mar_DISABLE);

  • 0 in reply to Sahin Okur
    Intellectual 610 points

    Hi Sahin,

    I did this in the cfg files in both the DSP projects.

    Cache.setMarMeta(0x405F0000, 0x1000, Cache.Mar_DISABLE);

    DSP2 still does not seem to be able to reflect changes at memory location 0x405F0000 from DSP1.

    I also tried diabling caching of OCMC_RAM3 completely using

    Cache.setMarMeta(0x40500000, 0x100000, Cache.Mar_DISABLE);

    but it still did not work.

    Is there anything I need to do in the resource table? Or could this be something related to the MMUs in the DSPs?

    Regards,

    Shaunak 

  • 0 in reply to Shaunak Shilimkan
    Intellectual 610 points
    Hi Sahin,

    I went another route and resolved the issue.
    Here is what I did:
    1. Sectioned DSP2 L2SRAM using the L3_MAIN addr (0x4100_0000) in DSP1 and placed data I needed there. You need to create the section in package.bld
    2. Accessed L2SRAM from DSP2 as usual at 0x00800000.

    Thanks for your suggestions.

    Regards,
    Shaunak
  • 0 in reply to Shaunak Shilimkan
    TI__Mastermind 27355 points
    I see, thank you for providing an update. I am glad you were able to resolve your issue!